From f704e93efac8193447543e518068c3d0ad1c3689 Mon Sep 17 00:00:00 2001
From: uvok cheetah
Date: Sun, 15 Mar 2026 13:52:55 +0100
Subject: Include TOC for Verilog series

---
 _includes/verilog.md | 12 ++++++++++++
 1 file changed, 12 insertions(+)
 create mode 100644 _includes/verilog.md

(limited to '_includes')

diff --git a/_includes/verilog.md b/_includes/verilog.md
new file mode 100644
index 0000000..d89bbb0
--- /dev/null
+++ b/_includes/verilog.md
@@ -0,0 +1,12 @@
+
+---
+{: .spaced.top }
+
+## Verilog series
+
+0. [Presenting my FPGA dev board]({% post_url 2025-12-26-fpga-dev-board %})
+1. [Getting Started with Verilog]({% post_url 2026-01-06-getting-started-with-verilog %})
+2. TODO
+
+---
+{: .spaced.bottom }
-- 
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