fpga-exper/.gitignore, branch main
FPGA experiments
https://git.uvok.de/fpga-exper/atom?h=main
2026-01-12T18:43:51Z
git: ignore parsetab
2026-01-12T18:43:51Z
uvok
2026-01-12T18:43:51Z
urn:sha1:8912777281a8fee34254d2c070d922836660c208
git: ignore parser.out
2026-01-12T18:28:22Z
uvok
2026-01-12T18:28:22Z
urn:sha1:daa280b98a5bcf767c8692ced66bece53577afe4
Ignore build dir
2026-01-11T09:32:05Z
uvok
2026-01-11T09:32:05Z
urn:sha1:a23d4c2aca8df7057b13abd8eab4b0f0b84a2b70
Ignore compiled python stuff
2026-01-11T09:14:42Z
uvok
2026-01-11T09:14:42Z
urn:sha1:c9ae126693c0412ab480249495ed58aa435032b0
ignore clangd cache file
2026-01-10T08:54:18Z
uvok
2026-01-09T18:37:25Z
urn:sha1:39cbced9dd21d490ddd234fc0e9f8993436e5c60
Update gitignore
2026-01-08T18:42:13Z
uvok
2026-01-08T18:42:13Z
urn:sha1:642bc651174e4b42ce9576c42a861985a8848d49
Update gitingore
2026-01-07T17:19:22Z
uvok
2026-01-07T17:17:12Z
urn:sha1:87cce9e35cd0307d8a8cb818b0b3bdd1a20338b7
Start by bin creator and disassembler
2026-01-04T13:07:05Z
uvok
2026-01-04T13:07:05Z
urn:sha1:0cbdabeaec491088d581abb6efd93f39b7166168
make: Add rules for verilator simulation
2025-12-28T13:01:42Z
uvok
2025-12-28T13:01:42Z
urn:sha1:40245bbc8c364c4e1673332c9fcc243ede6dc264
Add simulation targets
2025-12-26T09:49:02Z
uvok
2025-12-26T09:49:02Z
urn:sha1:4c127436520b897202cb04bb5150cf8d1a17d991