fpga-exper/nandgame, branch mainFPGA experimentshttps://git.uvok.de/fpga-exper/atom?h=main2026-01-18T09:58:56Zcounter: Add "count_enable" pin2026-01-18T09:58:56Zuvok2026-01-18T09:58:56Zurn:sha1:1cfdda0d9f76d36df95677e631b8b15dd19b4dcb(System)Verilog: Be explicit about wire/logic2026-01-16T17:22:36Zuvok2026-01-16T17:22:10Zurn:sha1:47c26f27b8be4c6c22ed81f701f1b25072bb3341parser: Add support for bin,oct and fix hex nums2026-01-16T11:50:27Zuvok2026-01-16T11:50:27Zurn:sha1:63601830da505314839ebe4edbcf6c88af16c69bparser:restart instead of errok2026-01-16T11:35:23Zuvok2026-01-16T11:35:23Zurn:sha1:d7dfbe810354335ca39c8d14013782b7e8152fd3
parser needs to be in state 0 again to continue parsing.
add deliberately broken example2026-01-16T11:31:33Zuvok2026-01-16T11:31:33Zurn:sha1:1e7ccaafc835b84e9b1d82aaff0e2c057272728aparse,lex: Make # separate token2026-01-16T11:28:53Zuvok2026-01-16T11:28:53Zurn:sha1:fbadf2115f8159d77916b1295e6fe1fff2f27a5bAdd exmple with equ directive2026-01-16T11:22:52Zuvok2026-01-16T11:22:52Zurn:sha1:5992a5d9355b62cb7f442247f32243f7f9c08baeallow capital letters start in symbol names2026-01-15T18:59:36Zuvok2026-01-15T18:59:36Zurn:sha1:543399c2380bb3f9a0c54cd79504e95843bf6909assembler: Avoid NoneError2026-01-15T18:58:38Zuvok2026-01-15T18:58:38Zurn:sha1:9b760dd630160d0a2ab931f82658b9fbb7f3b3ae
check result
hack: Fix verilator annotation2026-01-15T16:44:53Zuvok2026-01-15T16:44:53Zurn:sha1:f0cc58df7795ea3925bd1142f69214fdfe54dba7