make: Use variables for suffixes

2 files changed, 30 insertions, 23 deletions

diff --git a/Makefile b/Makefile
index 48875cc..0ed197e 100644
--- a/Makefile
+++ b/Makefile
@@ -5,6 +5,10 @@ MAKEFLAGS += --no-builtin-variables
 ## Variables
 PROGRAM ?= led
 CST ?= tangnano9k.cst
+
+HARDWARE_SUFFIX := .v
+TESTBENCH_SUFFIX := _tb.v
+
 FLASH_OPTS ?=
 # https://github.com/YosysHQ/apicula/wiki/Nextpnr%E2%80%90Himbaechel-Gowin
 # but
@@ -26,8 +30,8 @@ DEPS := $(wildcard *.dep)
 
 # this is "bad", as it runs the deps target every time
 # probably because of the include below
-# SOURCES := $(wildcard *.v)
-# DEPS := $(SOURCES:.v=.dep)
+# SOURCES := $(wildcard *$(HARDWARE_SUFFIX))
+# DEPS := $(SOURCES:$(HARDWARE_SUFFIX)=.dep)
 
 
 ## default target
@@ -41,7 +45,7 @@ tangnano9k.cst:
 
 ## helper targets
 .PHONY: clean flash show
-show: $(PROGRAM).v
+show: $(PROGRAM)$(HARDWARE_SUFFIX)
 	yosys -p "read_verilog $<; prep; show $(PROGRAM)"
 
 flash: $(PROGRAM).fs
@@ -56,13 +60,13 @@ simu: $(PROGRAM).lxt2
 simu2: verilator.$(PROGRAM)/dump.vvp
 	gtkwave $< >/dev/null 2>&1
 
-lint: $(PROGRAM).v
-	verilator --quiet --lint-only -Wall -Wno-PROCASSINIT $(PROGRAM).v
+lint: $(PROGRAM)$(HARDWARE_SUFFIX)
+	verilator --quiet --lint-only -Wall -Wno-PROCASSINIT $(PROGRAM)$(HARDWARE_SUFFIX)
 
 ## Patterns
 
 # synthesize
-%.json: %.v
+%.json: %$(HARDWARE_SUFFIX)
 #	sh resolvedeps.sh $<
 # only used for dep-generation, output file is needed for dep file, but otherwise useless
 # this must happen *without* synth_gowin, as this includes additional files, which ruin the depfile.
@@ -71,7 +75,7 @@ lint: $(PROGRAM).v
 
 # because yosys -E is buggy, or behaves differently than expected,
 # use gawk to force-create deps.
-%.dep: %.v
+%.dep: %$(HARDWARE_SUFFIX)
 #	sh resolvedeps.sh $<
 	yosys $< -E $*.dep -o $*.json && rm -f $*.json
 
@@ -96,14 +100,14 @@ lint: $(PROGRAM).v
 %.lxt2: %.vvp
 	./$< -lxt2
 
-%.vvp: %.v %_tb.v
-	iverilog -DDUMP_FILE_NAME='"$*.lxt2"' -g2012 -o $*.vvp $*.v $*_tb.v
+%.vvp: %$(HARDWARE_SUFFIX) %$(TESTBENCH_SUFFIX)
+	iverilog -DDUMP_FILE_NAME='"$*.lxt2"' -g2012 -o $*.vvp $*$(HARDWARE_SUFFIX) $*$(TESTBENCH_SUFFIX)
 
 # verilog unfortunately exits on any warning
 # also on warnings "boohoo, you specified timings in some modules and not in others"
 # since this is fucking annoying, I choose to ignore the exit code.
-verilator.%: %.v %_tb.v
-	verilator --quiet -DDUMP_FILE_NAME='"dump.vvp"' --trace --timing --main --exe --Mdir verilator.$(*) $(*)_tb.v || true
+verilator.%: %$(HARDWARE_SUFFIX) %$(TESTBENCH_SUFFIX)
+	verilator --quiet -DDUMP_FILE_NAME='"dump.vvp"' --trace --timing --main --exe --Mdir verilator.$(*) $(*)$(TESTBENCH_SUFFIX) || true
 
 # need to specify RM for some reason
 # verilators makefiles doesn't specify the variable
diff --git a/nandgame/Makefile b/nandgame/Makefile
index 1c8dae2..df865aa 100644
--- a/nandgame/Makefile
+++ b/nandgame/Makefile
@@ -3,8 +3,11 @@ MAKEFLAGS += --no-builtin-variables
 .SUFFIXES:
 
 ## Variables
-PROGRAM ?= led
+PROGRAM ?= computer
 CST ?= tangnano9k.cst
+
+HARDWARE_SUFFIX := .sv
+TESTBENCH_SUFFIX := _tb.sv
 FLASH_OPTS ?=
 # https://github.com/YosysHQ/apicula/wiki/Nextpnr%E2%80%90Himbaechel-Gowin
 # but
@@ -26,8 +29,8 @@ DEPS := $(wildcard *.dep)
 
 # this is "bad", as it runs the deps target every time
 # probably because of the include below
-# SOURCES := $(wildcard *.sv)
-# DEPS := $(SOURCES:.sv=.dep)
+# SOURCES := $(wildcard *$(HARDWARE_SUFFIX))
+# DEPS := $(SOURCES:$(HARDWARE_SUFFIX)=.dep)
 
 
 ## default target
@@ -41,7 +44,7 @@ tangnano9k.cst:
 
 ## helper targets
 .PHONY: clean flash show
-show: $(PROGRAM).sv
+show: $(PROGRAM)$(HARDWARE_SUFFIX)
 	yosys -p "read_verilog -sv $<; prep; show $(PROGRAM)"
 
 flash: $(PROGRAM).fs
@@ -56,13 +59,13 @@ simu: $(PROGRAM).lxt2
 simu2: verilator.$(PROGRAM)/dump.vvp
 # 	gtkwave $< >/dev/null 2>&1
 
-lint: $(PROGRAM).sv
-	verilator --quiet --lint-only -Wall -Wno-PROCASSINIT $(PROGRAM).sv
+lint: $(PROGRAM)$(HARDWARE_SUFFIX)
+	verilator --quiet --lint-only -Wall -Wno-PROCASSINIT $(PROGRAM)$(HARDWARE_SUFFIX)
 
 ## Patterns
 
 # synthesize
-%.json: %.sv
+%.json: %$(HARDWARE_SUFFIX)
 #	sh resolvedeps.sh $<
 # only used for dep-generation, output file is needed for dep file, but otherwise useless
 # this must happen *without* synth_gowin, as this includes additional files, which ruin the depfile.
@@ -71,7 +74,7 @@ lint: $(PROGRAM).sv
 
 # because yosys -E is buggy, or behaves differently than expected,
 # use gawk to force-create deps.
-%.dep: %.sv
+%.dep: %$(HARDWARE_SUFFIX)
 #	sh resolvedeps.sh $<
 	yosys $< -E $*.dep -o $*.json && rm -f $*.json
 
@@ -97,14 +100,14 @@ lint: $(PROGRAM).sv
 	./$< -lxt2
 
 .NOTINTERMEDIATE: %.vvp
-%.vvp: %.sv %_tb.sv
-	iverilog -DDUMP_FILE_NAME='"$*.lxt2"' -g2012 -o $*.vvp $*.sv $*_tb.sv
+%.vvp: %$(HARDWARE_SUFFIX) %$(TESTBENCH_SUFFIX)
+	iverilog -DDUMP_FILE_NAME='"$*.lxt2"' -g2012 -o $*.vvp $*$(HARDWARE_SUFFIX) $*$(TESTBENCH_SUFFIX)
 
 # verilog unfortunately exits on any warning
 # also on warnings "boohoo, you specified timings in some modules and not in others"
 # since this is fucking annoying, I choose to ignore the exit code.
-verilator.%: %.sv %_tb.sv
-	verilator --quiet -DDUMP_FILE_NAME='"dump.vvp"' --trace --timing --main --exe --Mdir verilator.$(*) $(*)_tb.sv || true
+verilator.%: %$(HARDWARE_SUFFIX) %$(TESTBENCH_SUFFIX)
+	verilator --quiet -DDUMP_FILE_NAME='"dump.vvp"' --trace --timing --main --exe --Mdir verilator.$(*) $(*)$(TESTBENCH_SUFFIX) || true
 
 # need to specify RM for some reason
 # verilators makefiles doesn't specify the variable