Document clock freq

1 files changed, 1 insertions, 1 deletions

diff --git a/README.txt b/README.txt
index 63529e3..7d8c29e 100644
--- a/README.txt
+++ b/README.txt
@@ -3,4 +3,4 @@ Learnings:
 - Anything that needs to "store" a state must be a reg?
   => wire's can't be assigned in always blocks, yosys complains
 - regs must not lead to wires? (unsure where I read that)
-
+- Clock on the tang9k is 27 MHz