eater: Implement leftover states and state transitions

2 files changed, 84 insertions, 13 deletions

diff --git a/eater_cpu/eater_decoder.sv b/eater_cpu/eater_decoder.sv
index 2246826..4e8973c 100644
--- a/eater_cpu/eater_decoder.sv
+++ b/eater_cpu/eater_decoder.sv
@@ -12,6 +12,8 @@ CpuState internal_state;
 CpuState next_state;
 CpuControlFlags internal_flags;
 
+wire [3:0] actual_instruction = instruction_i[7:4];
+
 assign flags_o = internal_flags;
 
 initial begin
@@ -21,25 +23,38 @@ initial begin
     // internal_flags = '{default: '0};
 end
 
+function CpuState insdep_state;
+    case (actual_instruction)
+    LDA: insdep_state = LDA_INS_to_MAR;
+    ADD: insdep_state = ADD_INS_to_MAR;
+    OUT: insdep_state = OUT_A_to_OUT;
+
+    default: insdep_state = INIT;
+    endcase
+endfunction
+
 // next-state machine
 always @(posedge clk_i) begin
     next_state = INIT;
 
     case (internal_state)
-    INIT: begin
-        next_state = PC_to_MAR;
-    end
-    PC_to_MAR: begin
-        next_state = MEM_to_INS;
-    end
 
-    MEM_to_INS: begin
-        next_state = PC_inc;
-    end
+    INIT: next_state = PC_to_MAR;
 
-    PC_inc: begin
-        next_state = PC_to_MAR;
-    end
+    PC_to_MAR: next_state = MEM_to_INS;
+
+    MEM_to_INS: next_state = PC_inc;
+
+    PC_inc: next_state = insdep_state();
+
+    LDA_INS_to_MAR: next_state = LDA_MEM_to_A;
+    LDA_MEM_to_A: next_state = PC_to_MAR;
+
+    ADD_INS_to_MAR: next_state = ADD_MEM_to_B;
+    ADD_MEM_to_B: next_state = ADD_ALU_to_A;
+    ADD_ALU_to_A: next_state = PC_to_MAR;
+
+    OUT_A_to_OUT: next_state = PC_to_MAR;
 
     default: begin
        next_state = INIT; 
@@ -73,8 +88,40 @@ always_comb begin
     PC_inc: begin
         internal_flags.PC_count = 1;
     end
+
+    LDA_INS_to_MAR: begin
+        internal_flags.INS_out = 1;
+        internal_flags.MAR_in = 1;
+    end
+
+    LDA_MEM_to_A: begin
+        internal_flags.RAM_out = 1;
+        internal_flags.A_in = 1;
+    end
+
+    ADD_INS_to_MAR: begin
+        internal_flags.INS_out = 1;
+        internal_flags.MAR_in = 1;
+    end
+
+    ADD_MEM_to_B: begin
+        internal_flags.RAM_out = 1;
+        internal_flags.B_in = 1; 
+    end
+
+    ADD_ALU_to_A: begin
+        internal_flags.ALU_out = 1;
+        internal_flags.A_in = 1;
+    end
+
+    OUT_A_to_OUT: begin
+        internal_flags.A_out = 1;
+        internal_flags.OUT_in = 1;
+    end
+
     default: begin
     end
+
     endcase
 end
 
diff --git a/eater_cpu/eater_types.sv b/eater_cpu/eater_types.sv
index d1699b0..80a5fee 100644
--- a/eater_cpu/eater_types.sv
+++ b/eater_cpu/eater_types.sv
@@ -5,12 +5,36 @@
 
 // CPU state (for control flags)
 typedef enum logic[7:0] {
+    // "regular" states
     INIT,
     PC_to_MAR,
     MEM_to_INS,
-    PC_inc
+    PC_inc,
+
+    // instruction dependent states
+
+    // LDA: a) LSB of INStruction into MAR
+    LDA_INS_to_MAR,
+    // LDA: b) MEM -> A
+    LDA_MEM_to_A,
+
+    // ADD: a) LSB of INStruction into MAR
+    ADD_INS_to_MAR,
+    // ADD: b) MEM -> B
+    ADD_MEM_to_B,
+    // ADD: c) ALU -> A
+    ADD_ALU_to_A,
+
+    // OUT: A -> OUT
+    OUT_A_to_OUT
 } CpuState;
 
+typedef enum logic[3:0] {  
+    LDA = 'b0000,
+    ADD = 'b0001,
+    OUT = 'b1110
+} eater_instruction;
+
 // CPU control flags
 `ifdef IVERILOG
 typedef struct packed {