eater: Use control flag struct in computer

3 files changed, 59 insertions, 72 deletions

diff --git a/eater_cpu/eater_computer.sv b/eater_cpu/eater_computer.sv
index f9104af..b93f289 100644
--- a/eater_cpu/eater_computer.sv
+++ b/eater_cpu/eater_computer.sv
@@ -2,6 +2,8 @@
 
 `timescale 1us/1us
 
+`include "eater_types.sv"
+
 module eater_computer(
   // clock input
   input wire clk_in,
@@ -38,23 +40,14 @@ wire [7:0]
 // PC is only 4 bit.
 wire [3:0] PC_in, PC_out;
 
-logic
-      A_to_bus, bus_to_A,
-      B_to_bus, bus_to_B,
-      INS_to_bus, bus_to_INS,
-      RAM_to_bus, bus_to_RAM,
-      ALU_to_bus,
-      PC_to_bus, bus_to_PC, PC_count_en,
-      bus_to_MAR,
-      bus_to_OUT
-;
+CpuControlFlags flags;
 
 /* verilator public_off */
 
 eater_register A (
   .clk_in(clk_in),
-  .en_store_in(bus_to_A),
-  .en_output_in(A_to_bus),
+  .en_store_in(flags.A_in),
+  .en_output_in(flags.A_out),
   .data_in(bus),
   .bus_out(bus),
   .always_out(A_out)
@@ -63,8 +56,8 @@ eater_register A (
 
 eater_register B (
   .clk_in(clk_in),
-  .en_store_in(bus_to_B),
-  .en_output_in(B_to_bus),
+  .en_store_in(flags.B_in),
+  .en_output_in(flags.B_out),
   .data_in(bus),
   .bus_out(bus),
   .always_out(B_out)
@@ -73,8 +66,8 @@ eater_register B (
 
 eater_register INS (
   .clk_in(clk_in),
-  .en_store_in(bus_to_INS),
-  .en_output_in(INS_to_bus),
+  .en_store_in(flags.INS_in),
+  .en_output_in(flags.INS_out),
   .data_in(bus),
   .bus_out(),
   .always_out(INS_out)
@@ -86,13 +79,13 @@ wire [7:0] INS_to_bus_interm = {4'b0, INS_out[3:0]};
 
 zbuffer INS_to_bus_buffer (
     .data_in(INS_to_bus_interm),
-    .en_output_in(INS_to_bus),
+    .en_output_in(flags.INS_out),
     .data_out(bus)
 );
 
 eater_register MEM_ADR (
   .clk_in(clk_in),
-  .en_store_in(bus_to_MAR),
+  .en_store_in(flags.MAR_in),
   .en_output_in(1'b0),
   .data_in(bus),
   .bus_out(),
@@ -110,7 +103,7 @@ my_mem #(
   .DATA_DEPTH(16)
 ) RAM (
   .clk_i(clk_in),
-  .write_en_i(bus_to_RAM),
+  .write_en_i(flags.RAM_in),
   // doesn't matter
   .read_en_i(),
   .r_read_addr(RAM_adr_in),
@@ -122,13 +115,13 @@ my_mem #(
 
 zbuffer ram_to_bus_buffer (
     .data_in(RAM_out),
-    .en_output_in(RAM_to_bus),
+    .en_output_in(flags.RAM_out),
     .data_out(bus)
 );
 
 eater_alu alu (
   .clk_in(clk_in),
-  .en_output_in(ALU_to_bus),
+  .en_output_in(flags.ALU_out),
   .A_in(A_out),
   .B_in(B_out),
   .subtract_n_add_in(1'b0),
@@ -143,8 +136,8 @@ counter #(
 ) PC (
   .clk_in(PC_clk_neg),
   .X_in(PC_in),
-  .st_store_X_in(bus_to_PC),
-  .count_enable_in(PC_count_en),
+  .st_store_X_in(flags.PC_in),
+  .count_enable_in(flags.PC_count),
   .counter_out(PC_out)
 );
 
@@ -152,14 +145,14 @@ assign PC_out_full = {4'b0, PC_out};
 
 zbuffer PC_to_bus_buffer (
     .data_in(PC_out_full),
-    .en_output_in(PC_to_bus),
+    .en_output_in(flags.PC_out),
     .data_out(bus)
 );
 
 eater_register OUT (
   .clk_in(clk_in),
   .data_in(bus),
-  .en_store_in(bus_to_OUT),
+  .en_store_in(flags.OUT_in),
   .en_output_in(1'b0),
   .bus_out(),
   .always_out(OUT_out)
diff --git a/eater_cpu/eater_computer_tb.sv b/eater_cpu/eater_computer_tb.sv
index 47ef16f..019bcb1 100644
--- a/eater_cpu/eater_computer_tb.sv
+++ b/eater_cpu/eater_computer_tb.sv
@@ -24,20 +24,20 @@ initial begin
   $dumpfile("simpc.vvp");
   $dumpvars();
 
-  uut.A_to_bus = 0;
-  uut.B_to_bus = 0;
-  uut.INS_to_bus = 0;
-  uut.ALU_to_bus = 0;
-  uut.RAM_to_bus = 0;
-  uut.PC_to_bus = 0;
-  uut.PC_count_en = 0;
-
-  uut.bus_to_A = 0;
-  uut.bus_to_B = 0;
-  uut.bus_to_INS = 0;
-  uut.bus_to_RAM = 0;
-  uut.bus_to_PC = 0;
-  uut.bus_to_MAR = 0;
+  uut.flags.A_out = 0;
+  uut.flags.B_out = 0;
+  uut.flags.INS_out = 0;
+  uut.flags.ALU_out = 0;
+  uut.flags.RAM_out = 0;
+  uut.flags.PC_out = 0;
+  uut.flags.PC_count = 0;
+
+  uut.flags.A_in = 0;
+  uut.flags.B_in = 0;
+  uut.flags.INS_in = 0;
+  uut.flags.RAM_in = 0;
+  uut.flags.PC_in = 0;
+  uut.flags.MAR_in = 0;
   clk_in = 0;
   debug_enable = 0;
   debug_value = 'z;
@@ -52,91 +52,91 @@ initial begin
 
   @(negedge clk_in);
   debug_value = 'h00;
-  uut.bus_to_MAR = 1;
+  uut.flags.MAR_in = 1;
 
   @(negedge clk_in);
-  uut.bus_to_MAR = 0;
+  uut.flags.MAR_in = 0;
   debug_value = 'h04;
-  uut.bus_to_PC = 1;
+  uut.flags.PC_in = 1;
 
   @(negedge clk_in);
-  uut.bus_to_PC = 0;
+  uut.flags.PC_in = 0;
   debug_value = 'haa;
-  uut.bus_to_A = 1;
+  uut.flags.A_in = 1;
 
   @(negedge clk_in);
-  uut.bus_to_A = 0;
+  uut.flags.A_in = 0;
   debug_value = 'hbb;
-  uut.bus_to_B = 1;
+  uut.flags.B_in = 1;
 
   @(negedge clk_in);
-  uut.bus_to_B = 0;
+  uut.flags.B_in = 0;
   debug_value = 'hcc;
-  uut.bus_to_INS = 1;
+  uut.flags.INS_in = 1;
 
   @(negedge clk_in);
-  uut.bus_to_INS = 0;
+  uut.flags.INS_in = 0;
   debug_value = 'hdd;
-  uut.bus_to_RAM = 1;
+  uut.flags.RAM_in = 1;
 
   @(negedge clk_in);
-  uut.bus_to_RAM = 0;
+  uut.flags.RAM_in = 0;
 
   @(negedge clk_in);
   debug_enable = 0;
   debug_value = 'z;
 
   @(negedge clk_in);
-  uut.A_to_bus = 1;
+  uut.flags.A_out = 1;
 
   @(negedge clk_in);
   assert (uut.bus == 'haa) 
   else   $error("Expected 0xaa (from REG A), got 0x%02x on bus", uut.bus);
-  uut.A_to_bus = 0;
-  uut.B_to_bus = 1;
+  uut.flags.A_out = 0;
+  uut.flags.B_out = 1;
 
   @(negedge clk_in);
   assert (uut.bus == 'hbb) 
   else   $error("Expected 0xbb (from REG B), got 0x%02x on bus", uut.bus);
-  uut.B_to_bus = 0;
-  uut.INS_to_bus = 1;
+  uut.flags.B_out = 0;
+  uut.flags.INS_out = 1;
 
   @(negedge clk_in);
   assert (uut.bus == 'h0c) 
   else   $error("Expected 0x0c (from INS), got 0x%02x on bus", uut.bus);
   // ERROR: TODO: should I expect 'zc or '0c ?
-  uut.INS_to_bus = 0;
+  uut.flags.INS_out = 0;
 
   @(negedge clk_in);
-  uut.ALU_to_bus = 1;
+  uut.flags.ALU_out = 1;
 
   @(negedge clk_in);
   assert (uut.bus == 8'('haa + 'hbb))
   else   $error("Expected 0x%02x (from ALU), got 0x%02x on bus", 8'('haa + 'hbb), uut.bus);
-  uut.ALU_to_bus = 0;
-  uut.PC_to_bus = 1;
+  uut.flags.ALU_out = 0;
+  uut.flags.PC_out = 1;
 
   @(negedge clk_in);
   assert (uut.bus == 'h04) 
   else   $error("Expected 0x04 (from PC), got 0x%02x on bus", uut.bus);
-  uut.PC_to_bus = 0;
-  uut.RAM_to_bus = 1;
+  uut.flags.PC_out = 0;
+  uut.flags.RAM_out = 1;
 
   @(negedge clk_in);
   assert (uut.bus == 'hdd) 
   else   $error("Expected 0xdd (from RAM), got 0x%02x on bus", uut.bus);
-  uut.RAM_to_bus = 0;
+  uut.flags.RAM_out = 0;
 
   @(negedge clk_in);
   debug_enable = 1;
   debug_value = 'h01;
-  uut.bus_to_MAR = 1;
+  uut.flags.MAR_in = 1;
 
   @(negedge clk_in);
   debug_enable = 0;
   debug_value = 'bz;
-  uut.bus_to_MAR = 0;
-  uut.RAM_to_bus = 1;
+  uut.flags.MAR_in = 0;
+  uut.flags.RAM_out = 1;
 
   @(negedge clk_in);
   $info("Got 0x%02x from RAM", uut.bus);
diff --git a/eater_cpu/eater_decoder.sv b/eater_cpu/eater_decoder.sv
index d6b6c4c..1ce9cee 100644
--- a/eater_cpu/eater_decoder.sv
+++ b/eater_cpu/eater_decoder.sv
@@ -16,12 +16,6 @@ CpuControlFlags internal_flags;
 always_comb begin
     if (enable_control_i) begin
         flags_o = internal_flags;
-    end else begin
-`ifdef IVERILOG
-        flags_o = 'bz;
-`else
-        flags_o = '{default: 'z};
-`endif
     end
 end