diff options
| author | uvok | 2026-01-19 18:21:46 +0100 |
|---|---|---|
| committer | uvok | 2026-01-19 18:21:46 +0100 |
| commit | 7df6b0daf422706111168cf1fcc0fa444453b12c (patch) | |
| tree | e450aad9a69575d18c912bd28d11088a10f80173 /eater_cpu/cpp/simpc_term.cpp | |
| parent | 30e5e25f17d5fab59315e7246828912b29ada5c0 (diff) | |
eater: Add verilator/cmake project
Diffstat (limited to 'eater_cpu/cpp/simpc_term.cpp')
| -rw-r--r-- | eater_cpu/cpp/simpc_term.cpp | 96 |
1 files changed, 96 insertions, 0 deletions
diff --git a/eater_cpu/cpp/simpc_term.cpp b/eater_cpu/cpp/simpc_term.cpp new file mode 100644 index 0000000..601a8cd --- /dev/null +++ b/eater_cpu/cpp/simpc_term.cpp @@ -0,0 +1,96 @@ +#include "Veater_computer_eater_register.h" +#include "simpc_ui.h" + +#include "disas.h" + +#define NCUR_X 5 +#define attroff(...) +#define attron(...) +#define PRINT_ME(y, x, ...) \ + { \ + printf("%*c", x, ' '); \ + printf(__VA_ARGS__); \ + printf("\n"); \ + } +#define PRINT_ME_W(w, y, x, ...) \ + { \ + printf("%*c", x, ' '); \ + printf(__VA_ARGS__); \ + printf("\n"); \ + } +#define PRINT_NEXT() \ + { puts("-----"); } + +#include "Veater_computer.h" +#include "Veater_computer_eater_computer.h" +#include "Veater_computer_eater_alu.h" +#include "verilated.h" +#include <cstdint> +#include <cstdio> +#include <sched.h> + +bool paused = false; + +static void handle_key(); + +void simpc_ui_write(const std::unique_ptr<Veater_computer> &topp, uint64_t i) { + // uint16_t opcode = topp->eater_computer->; + uint8_t opcode = topp->eater_computer->INS->r_datastore; + // topp->halt + uint8_t halt = 0; + + PRINT_ME_W(status_top, 0, 0, "Step: %10lu", i); + PRINT_ME_W(status_top, 1, 0, "%-20s", paused ? "Paused" : "Running"); + + PRINT_ME(3, NCUR_X, "CLK1: %4d\tState: 0x%02X\tHLT: %d", + topp->clk_in, + topp->eater_computer->__PVT__decoder__DOT__internal_state, + halt); + + PRINT_ME(4, NCUR_X, "BUS: %02X\tPC: @0x%02X\tINS: 0x%02X", + topp->eater_computer->bus, + topp->eater_computer->PC_out, + opcode + ); + + std::string insline{"???"}; //print_decoded(opcode, true); + PRINT_ME(5, NCUR_X, "%-80s", insline.c_str()); + + PRINT_ME(7, NCUR_X, "A: 0x%02X\tB: 0x%02X\tALU: 0x%02X\tOUT: 0x%02X", + topp->eater_computer->A->r_datastore, topp->eater_computer->B->r_datastore, + topp->eater_computer->alu->result, topp->eater_computer->OUT->r_datastore); + // PRINT_ME( + // 8, NCUR_X, "%c%8d\t%c%8d\t%c%8d\t%11d", + // topp->computer->store_to_A_int ? '*' : ' ', topp->computer->reg_A_int, + // topp->computer->store_to_D_int ? '*' : ' ', topp->computer->reg_D_int, + // topp->computer->store_to_pA_int ? '*' : ' ', topp->computer->reg_pA_int, + // topp->computer->result_int); + + PRINT_NEXT(); +} + +void simpc_ui_finish_message(const std::unique_ptr<VerilatedContext> &contextp, + const std::unique_ptr<Veater_computer> &topp) { + attron(A_BOLD); + auto xpos = 20; + PRINT_ME_W(status_top, 0, xpos, "Simulation finished."); + const char *msg; + // topp->halt + bool halt = false; + if (halt) { + msg = "Halt encountered."; + } else if (!contextp->gotFinish()) { + msg = "Step count exceeded."; + } else { + msg = "Regular finish."; + } + PRINT_ME_W(status_top, 1, xpos, "%s", msg); + + attroff(A_BOLD); +} + +void simpc_ui_init(void) {} + +void simpc_ui_cleanup(void) {} + +void simpc_ui_confirm_finish(void) {} |
