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authoruvok2026-01-18 18:41:54 +0100
committeruvok2026-01-18 18:41:54 +0100
commitf35ac43fb9d695de167e820ff0b70c374fa046ca (patch)
tree37cf05aaae3d4448902afa1d00568dfbbea52078 /eater_cpu/readme.txt
parent3ca7eefcaae2756106317adeb7d7f73375939b3f (diff)
eater: update docs
Diffstat (limited to 'eater_cpu/readme.txt')
-rw-r--r--eater_cpu/readme.txt93
1 files changed, 68 insertions, 25 deletions
diff --git a/eater_cpu/readme.txt b/eater_cpu/readme.txt
index 51a63b2..f92fdd7 100644
--- a/eater_cpu/readme.txt
+++ b/eater_cpu/readme.txt
@@ -1,25 +1,68 @@
- | 4 LSB
- +<--------> PC
- |
- |
- 4 LSB |
-MAR <------------+<--------> A
- | | |
- | 4 LSB | |
- | | |
- v | v
-RAM <------------>|<-------- ALU
- | ^
- | |
- | |
- | |
- <-------------+ |
- IR ------------->|<--------> B
- | 4 LSB |
- | |
- | |
- | 4 MSB +---------> OUT
- | | |
- v | |
- ins v
- decoder DISPLAY
+ 4 LSB
+ +<--------> PC
+ |
+ |
+ 4 LSB |
+ MAR <-------------+<--------> A
+ | | |
+ | 4 LSB | |
+ | | |
+ v | v
+ RAM <------------>|<-------- ALU
+ | ^
+ | |
+ | |
+ | |
+ <-------------+ |
+ IR ------------->|<--------> B
+ | 4 LSB |
+ | |
+ | |
+ | 4 MSB +---------> OUT
+ | |
+ v |
+ ins v
+ decoder DISPLAY
+
+---
+
+instruction set
+
+LDA <memaddress> 0b_0000_<memaddress> Load memory > A
+ADD <memaddress> 0b_0001_<memaddress> "Add memory" + A -> A
+OUT <memaddress> 0b_1110_xxxx Output A -> OUT
+
+---
+
+operation
+
+1. Load instruction @ PC into INS,
+ Increment PC.
+ a) PC out -> MAR
+ (PC_to_bus) + (bus_to_MAR) + (clk)
+ b) MEM -> INS
+ (RAM_to_bus) + (bus_to_INS) + (clk)
+ c) PC++
+ (PC_count_en) + (clk)
+
+2. Decode and execute instruction.
+
+2.I LDA: Load memory into A
+ a) INS_lsb -> MAR
+ (INS_to_bus) + (bus_to_MAR) + (clk)
+ b) MEM -> A
+ (RAM_to_bus) + (bus_to_A) + (clk)
+
+2.II ADD: Load mem in B,
+ ALU "auto" adds,
+ put back in A
+ a) INS_lsb -> MAR
+ (INS_to_bus) + (bus_to_MAR) + (clk)
+ b) MEM -> B
+ (RAM_to_bus) + (bus_to_B) + (clk)
+ c) ALU -> A
+ (ALU_to_bus) + (bus_to_A) + (clk)
+
+2.III OUT: Put A in OUT
+ a) A -> OUT
+ (A_to_bus) + (bus_to_OUT) + (clk)