eater_alu: Use 2complneg instead of subtract

3 files changed, 45 insertions, 1 deletions

diff --git a/eater_cpu/eater_alu.sv b/eater_cpu/eater_alu.sv
index b0fa9ae..01b62ae 100644
--- a/eater_cpu/eater_alu.sv
+++ b/eater_cpu/eater_alu.sv
@@ -6,12 +6,19 @@ module eater_alu (
     input clk_in,
     input en_output_in,
 
+    input subtract_n_add_in,
+
     input [7:0] A_in,
     input [7:0] B_in,
 
     output [7:0] bus_out
 );
 
-assign bus_out = en_output_in ? 0 : 8'bz;
+// wire [7:0] result = subtract_n_add_in ? (A_in - B_in) : (A_in + B_in);
+wire [7:0] xormask = {8{subtract_n_add_in}};
+wire [7:0] B_neg_if = B_in ^ xormask;
+wire [7:0] result2 = A_in + B_neg_if + subtract_n_add_in;
+
+assign bus_out = en_output_in ? result2 : 8'bz;
     
 endmodule
diff --git a/eater_cpu/eater_alu_tb.sv b/eater_cpu/eater_alu_tb.sv
new file mode 100644
index 0000000..c921804
--- /dev/null
+++ b/eater_cpu/eater_alu_tb.sv
@@ -0,0 +1,36 @@
+`timescale 1us/1us
+
+module eater_alu_tb;
+
+logic sub_n_add;
+logic [7:0] A, B, out;
+
+eater_alu uut(
+    .clk_in(1'b0),
+    .subtract_n_add_in(sub_n_add),
+    .A_in(A),
+    .B_in(B),
+    .en_output_in(1'b1),
+    .bus_out(out)
+);
+
+initial begin
+    $dumpfile("eater_alu.vvp");
+    $dumpvars();
+
+    sub_n_add = 0;
+    A = 10;
+    B = 5;
+    #1
+    assert(out == 15)
+    else $error("Exptected 15, got %d", out);
+    #1;
+    sub_n_add = 1;
+    #1
+    assert(out == 5)
+    else $error("Exptected 15, got %d", out);
+    #1;
+    $finish();
+end
+    
+endmodule
\ No newline at end of file
diff --git a/eater_cpu/eater_computer.sv b/eater_cpu/eater_computer.sv
index 4f1aba2..171e012 100644
--- a/eater_cpu/eater_computer.sv
+++ b/eater_cpu/eater_computer.sv
@@ -56,6 +56,7 @@ eater_alu alu (
   .en_output_in(ALU_to_bus),
   .A_in(A_out),
   .B_in(B_out),
+  .subtract_n_add_in(0),
   .bus_out(bus)
 );