diff options
| author | uvok | 2026-01-09 15:18:23 +0100 |
|---|---|---|
| committer | uvok | 2026-01-09 15:18:23 +0100 |
| commit | 6c83fd8730e55de8b1daaac1deb111d3d9bd408e (patch) | |
| tree | 33a3dbc4fd87011b657b193224c3f39c5de6b766 /my_mem.v | |
| parent | 678cb2d2d752bbac7625ba9b287762b3acabf116 (diff) | |
move stuff around
Diffstat (limited to 'my_mem.v')
| -rw-r--r-- | my_mem.v | 49 |
1 files changed, 0 insertions, 49 deletions
diff --git a/my_mem.v b/my_mem.v deleted file mode 100644 index 1153ec7..0000000 --- a/my_mem.v +++ /dev/null @@ -1,49 +0,0 @@ -`timescale 1us/1us - -`ifndef UVOK_MEMORY -`define UVOK_MEMORY - -module my_mem #( - parameter DATA_WIDTH = 8, - parameter DATA_DEPTH = 1024 -) ( - input clk_i, - - input write_en_i, - input read_en_i, - - input [$clog2(DATA_DEPTH)-1:0] r_read_addr, - input [$clog2(DATA_DEPTH)-1:0] r_write_addr, - - input [(DATA_WIDTH-1) : 0] data_i, - output reg [(DATA_WIDTH-1) : 0] data_o -); - -reg [(DATA_WIDTH-1) : 0] r_datastore [(DATA_DEPTH-1) : 0] /* verilator public */; - -`ifdef DEBUG -// for debugging simulations, as iverilog -// does't show r_datastore -reg [(DATA_WIDTH-1) : 0] r_cur_r_val; -reg [(DATA_WIDTH-1) : 0] r_cur_w_val; -`endif - -always @(posedge clk_i) begin - if (write_en_i) begin - r_datastore[r_write_addr] <= data_i; -`ifdef DEBUG - r_cur_w_val <= data_i; -`endif - end - - if (read_en_i) begin - data_o <= r_datastore[r_read_addr]; -`ifdef DEBUG - r_cur_r_val <= r_datastore[r_read_addr]; -`endif - end -end - -endmodule - -`endif |
