diff options
| author | uvok | 2026-01-02 19:36:30 +0100 |
|---|---|---|
| committer | uvok | 2026-01-02 19:36:30 +0100 |
| commit | 6c1db8cded8b8bb1c4d31a840f7dd9dddb8bbf7d (patch) | |
| tree | e8bb18228b55baf35dd540cd6e607857e9ecbaef /nandgame/instruction_decode.sv | |
| parent | e49b8a787f72daa3d08e278a9c32663c16531827 (diff) | |
Rename variables to be more clear, document
Diffstat (limited to 'nandgame/instruction_decode.sv')
| -rw-r--r-- | nandgame/instruction_decode.sv | 83 |
1 files changed, 47 insertions, 36 deletions
diff --git a/nandgame/instruction_decode.sv b/nandgame/instruction_decode.sv index 5bf4b02..25c3185 100644 --- a/nandgame/instruction_decode.sv +++ b/nandgame/instruction_decode.sv @@ -11,62 +11,73 @@ module instruction_decode #( parameter DATA_WIDTH = 16 ) ( - input [15:0] instruction, + // instruction to decode + input [15:0] instruction_in, - input [(DATA_WIDTH-1):0] A_i, - input [(DATA_WIDTH-1):0] D_i, - input [(DATA_WIDTH-1):0] pA_i, + // value of A register + input [(DATA_WIDTH-1):0] A_in, + // value of D register + input [(DATA_WIDTH-1):0] D_in, + // content of memory at address in A register + input [(DATA_WIDTH-1):0] pA_in, - output [(DATA_WIDTH-1):0] RES, - output do_jump, + // result of operation + output [(DATA_WIDTH-1):0] result_out, + // whether a jump should occur + output do_jump_out, - output dst_a, - output dst_d, - output dst_pa + // whether result should be stored to A + output dst_A_out, + // whether result should be stored to D + output dst_D_out, + // whether result should be stored in memory at address in A register + output dst_pA_out ); -wire is_immediate; -// bit 15 set = ALU instruction +wire is_immediate_int; +// bit 15 set = ALU instruction_in // bit 15 unset = immediate -assign is_immediate = !instruction[15]; +assign is_immediate_int = !instruction_in[15]; -assign dst_a = is_immediate || instruction[5]; -assign dst_d = !is_immediate && instruction[4]; -assign dst_pa = !is_immediate && instruction[3]; +assign dst_A_out = is_immediate_int || instruction_in[5]; +assign dst_D_out = !is_immediate_int && instruction_in[4]; +assign dst_pA_out = !is_immediate_int && instruction_in[3]; -wire use_pointer_a_for_alu; -wire [(DATA_WIDTH-1):0] alu_y; -assign use_pointer_a_for_alu = instruction[12]; -assign alu_y = use_pointer_a_for_alu ? pA_i : A_i; +wire use_pA_for_alu_op_int; +wire [(DATA_WIDTH-1):0] alu_operand_Y_int; +assign use_pA_for_alu_op_int = instruction_in[12]; +assign alu_operand_Y_int = use_pA_for_alu_op_int ? pA_in : A_in; -wire [(DATA_WIDTH-1):0] alu_res; +wire [(DATA_WIDTH-1):0] alu_result_int; alu #( .DATA_WIDTH(DATA_WIDTH) ) my_alu ( - .X(D_i), - .Y(alu_y), - .u(instruction[10]), - .opcode(instruction[9:8]), - .zx(instruction[7]), - .sw(instruction[6]), - .RES(alu_res) + .X_in(D_in), + .Y_in(alu_operand_Y_int), + .u_arith_nlogic_in(instruction_in[10]), + .opcode_in(instruction_in[9:8]), + .zx_in(instruction_in[7]), + .sw_in(instruction_in[6]), + .result_out(alu_result_int) ); -wire result_jump; +wire jump_result_int; cond_check #( .DATA_WIDTH(DATA_WIDTH) ) my_cond ( - .X(alu_res), - .ltz(instruction[2]), - .eqz(instruction[1]), - .gtz(instruction[0]), - .res(result_jump) + .X_in(alu_result_int), + .check_ltz_in(instruction_in[2]), + .check_eqz_in(instruction_in[1]), + .check_gtz_in(instruction_in[0]), + .result_out(jump_result_int) ); -assign do_jump = is_immediate ? 0 : result_jump; - -assign RES = is_immediate ? instruction : alu_res; +assign do_jump_out = is_immediate_int ? 0 : jump_result_int; +assign result_out = is_immediate_int ? + // technically not needed, since bit is 0 anyway... + { 1'b0, instruction_in[(DATA_WIDTH-2):0] } + : alu_result_int; endmodule |
