diff options
| author | uvok | 2026-01-02 19:36:30 +0100 |
|---|---|---|
| committer | uvok | 2026-01-02 19:36:30 +0100 |
| commit | 6c1db8cded8b8bb1c4d31a840f7dd9dddb8bbf7d (patch) | |
| tree | e8bb18228b55baf35dd540cd6e607857e9ecbaef /nandgame/logic_unit.sv | |
| parent | e49b8a787f72daa3d08e278a9c32663c16531827 (diff) | |
Rename variables to be more clear, document
Diffstat (limited to 'nandgame/logic_unit.sv')
| -rw-r--r-- | nandgame/logic_unit.sv | 34 |
1 files changed, 19 insertions, 15 deletions
diff --git a/nandgame/logic_unit.sv b/nandgame/logic_unit.sv index 89fe8fb..68f5c23 100644 --- a/nandgame/logic_unit.sv +++ b/nandgame/logic_unit.sv @@ -10,28 +10,32 @@ module logic_unit #( parameter DATA_WIDTH = 16 ) ( - input [(DATA_WIDTH-1):0] X, - input [(DATA_WIDTH-1):0] Y, - input LogicCode operation, - - output logic [(DATA_WIDTH-1):0] RES + // first operand + input [(DATA_WIDTH-1):0] X_in, + // second operand + input [(DATA_WIDTH-1):0] Y_in, + // opcode, see LogicCode + input LogicCode logic_operation_in, + + // result of operation + output logic [(DATA_WIDTH-1):0] result_out ); // learning: instead of this nested ternary... -// assign RES = operation == LOGIC_AND ? (X & Y) : -// operation == LOGIC_OR ? (X | Y) : -// operation == LOGIC_XOR ? (X ^ Y) : -// operation == LOGIC_NEGT ? (~X) : 0; +// assign result_out = logic_operation_in == LOGIC_AND ? (X_in & Y_in) : +// logic_operation_in == LOGIC_OR ? (X_in | Y_in) : +// logic_operation_in == LOGIC_XOR ? (X_in ^ Y_in) : +// logic_operation_in == LOGIC_NEGT ? (~X_in) : 0; // ... you can do this: always_comb begin - case (operation) - LOGIC_AND: RES = X & Y; - LOGIC_OR: RES = X | Y; - LOGIC_XOR: RES = X ^ Y; - LOGIC_NEGT: RES = ~X; - default: RES = 0; + case (logic_operation_in) + LOGIC_AND: result_out = X_in & Y_in; + LOGIC_OR: result_out = X_in | Y_in; + LOGIC_XOR: result_out = X_in ^ Y_in; + LOGIC_NEGT: result_out = ~X_in; + default: result_out = 0; endcase end |
