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authoruvok2026-01-11 12:21:27 +0100
committeruvok2026-01-11 12:21:27 +0100
commit66bb86b5e2c0d8a1d878dfeec4df1ccaa2816d99 (patch)
tree6e34dec7503a2ebbcab5831c5c14c230b5d7cd7f /nandgame
parent838bffe0d2a4296a42bc067435c654da021b7579 (diff)
Print RAM contents and specify memory context size
Diffstat (limited to 'nandgame')
-rw-r--r--nandgame/cpp/simpc_ui.cpp49
1 files changed, 41 insertions, 8 deletions
diff --git a/nandgame/cpp/simpc_ui.cpp b/nandgame/cpp/simpc_ui.cpp
index a17cbb9..e5aeb9d 100644
--- a/nandgame/cpp/simpc_ui.cpp
+++ b/nandgame/cpp/simpc_ui.cpp
@@ -5,6 +5,7 @@
#define NCUR_OFFSET 3
#define NCUR_X 5
+#define MEMORY_CONTEXT 3
#if NCUR
#include <ncurses.h>
@@ -33,6 +34,7 @@
#include "Vcomputer.h"
#include "Vcomputer___024root.h"
+#include "Vcomputer_comb_mem.h"
#include "Vcomputer_computer.h"
#include "Vcomputer_my_mem__D10_DB10000.h"
#include "verilated.h"
@@ -68,15 +70,46 @@ void simpc_ui_write(const std::unique_ptr<Vcomputer> &topp, uint64_t &i,
topp->computer->store_to_pA_int ? '*' : ' ', topp->computer->reg_pA_int,
topp->computer->result_int);
- PRINT_ME(10, NCUR_X, "--- ROM ---");
- for (int i = -1; i <= 1; i++) {
+ const int ram1_pos_offset = 35 + 1;
+ const int ram2_pos_offset = ram1_pos_offset + 14 + 1;
+ PRINT_ME(10, NCUR_X, "%-35s", "--- ROM ---");
+ PRINT_ME(10, NCUR_X + ram1_pos_offset, "%-35s", "--- RAM1 ---");
+ PRINT_ME(10, NCUR_X + ram2_pos_offset, "%-35s", "-- RAM2 --");
+ for (int i = -MEMORY_CONTEXT; i <= MEMORY_CONTEXT; i++) {
+ const int ypos_base = 10 + 1 + MEMORY_CONTEXT;
const char *prefix = i == 0 ? "> " : " ";
- uint16_t curadr = topp->computer->PC_addr_int + i;
- const uint16_t p = curadr;
- const uint16_t program_op_code = topp->computer->ROM->r_datastore[p];
- auto disas_code = print_decoded(program_op_code, true);
- PRINT_ME(12 + i, NCUR_X, "%04X %s%04X %-30s", curadr, prefix,
- program_op_code, disas_code.c_str());
+ int32_t current_ROM_address = topp->computer->PC_addr_int + i;
+ int32_t current_RAM_address = topp->computer->reg_A_int + i;
+ if (current_ROM_address < 0) {
+ PRINT_ME(
+ ypos_base + i, NCUR_X, "%.35s",
+ "---------------------------------------------------------------");
+ } else {
+ const uint16_t p = current_ROM_address;
+ const uint16_t program_op_code = topp->computer->ROM->r_datastore[p];
+ auto disas_code = print_decoded(program_op_code, true);
+ PRINT_ME(ypos_base + i, NCUR_X, "%04X %s%04X %-30s",
+ current_ROM_address, prefix, program_op_code,
+ disas_code.c_str());
+ }
+ if (current_RAM_address < 0) {
+ PRINT_ME(
+ ypos_base + i, NCUR_X + ram1_pos_offset, "%.12s",
+ "---------------------------------------------------------------");
+ } else {
+ const uint16_t p = current_RAM_address;
+ const uint16_t mem_content =
+ topp->computer->RAM->nand_memory->r_datastore[p];
+ PRINT_ME(ypos_base + i, NCUR_X + ram1_pos_offset, "%04X %s%04X",
+ current_RAM_address, prefix, mem_content);
+ }
+ {
+ const uint16_t p = MEMORY_CONTEXT + i;
+ const uint16_t mem_content =
+ topp->computer->RAM->nand_memory->r_datastore[p];
+ PRINT_ME(ypos_base + i, NCUR_X + ram2_pos_offset, "%04X %04X%30c", p,
+ mem_content, ' ');
+ }
}
// PRINT_ME(7 + NCUR_OFFSET, NCUR_X, "ALU");
// PRINT_ME(8 + NCUR_OFFSET, NCUR_X, "X: %5d\tY: %5d",