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| author | uvok | 2025-12-26 18:17:44 +0100 |
|---|---|---|
| committer | uvok | 2025-12-26 18:17:44 +0100 |
| commit | 36d351f4e07635a806d5ca67749fa6fb46db810f (patch) | |
| tree | 408630c0c6e8f92447ba8fe2d9607396a17001de /par_to_ser.v | |
| parent | 0846857a7e8ac4bef959ecf09ee5fa3ffc24991f (diff) | |
continue complaining
Diffstat (limited to 'par_to_ser.v')
| -rw-r--r-- | par_to_ser.v | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/par_to_ser.v b/par_to_ser.v index 5e261a9..b3a8eb0 100644 --- a/par_to_ser.v +++ b/par_to_ser.v @@ -18,7 +18,8 @@ reg [7:0] send_data = 8'hff; // Learning: // Ugh, this is fucking stupid. // if I send out directly at the rising clock edge, -// the output will violate setup and hold times??? +// the output, when directly used again with the same clock, +// will violate setup and hold times??? // always @(posedge clk_i or negedge rst_i) begin |
