diff options
| author | uvok | 2026-01-10 17:11:55 +0100 |
|---|---|---|
| committer | uvok | 2026-01-11 12:04:47 +0100 |
| commit | 01927971ea09b25d12e946b000b27938341ef88c (patch) | |
| tree | 79191d3a580c9b57e2fa4675f3dc30844c690cbe /playground/my_mem.v | |
| parent | 7c8d84fb83875a2f3a45d6450516ee5ac96717ee (diff) | |
Remove rando int
Diffstat (limited to 'playground/my_mem.v')
| -rw-r--r-- | playground/my_mem.v | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/playground/my_mem.v b/playground/my_mem.v index c38db3a..ebffcb8 100644 --- a/playground/my_mem.v +++ b/playground/my_mem.v @@ -22,18 +22,18 @@ module my_mem #( reg [(DATA_WIDTH-1) : 0] r_datastore [(DATA_DEPTH-1) : 0] /* verilator public */; -`ifdef VERILATE -initial begin - r_datastore[0] = 'h11; - r_datastore[1] = 'h22; - r_datastore[2] = 'h33; - r_datastore[3] = 'h44; - r_datastore[4] = 'h55; - r_datastore[5] = 'h66; - r_datastore[6] = 'h77; - r_datastore[7] = 'h88; -end -`endif +// `ifdef VERILATE +// initial begin +// r_datastore[0] = 'h11; +// r_datastore[1] = 'h22; +// r_datastore[2] = 'h33; +// r_datastore[3] = 'h44; +// r_datastore[4] = 'h55; +// r_datastore[5] = 'h66; +// r_datastore[6] = 'h77; +// r_datastore[7] = 'h88; +// end +// `endif `ifdef DEBUG // for debugging simulations, as iverilog |