diff options
| -rw-r--r-- | nandgame/cpp/CMakeLists.txt | 2 | ||||
| -rw-r--r-- | nandgame/cpp/Vcomputer__main.cpp | 2 | ||||
| -rw-r--r-- | nandgame/cpp/simpc_config.h | 2 | ||||
| -rw-r--r-- | nandgame/cpp/simpc_ui.cpp | 9 | ||||
| -rw-r--r-- | nandgame/hack_alu.sv | 33 |
5 files changed, 23 insertions, 25 deletions
diff --git a/nandgame/cpp/CMakeLists.txt b/nandgame/cpp/CMakeLists.txt index 99318c1..b87ccaa 100644 --- a/nandgame/cpp/CMakeLists.txt +++ b/nandgame/cpp/CMakeLists.txt @@ -4,7 +4,7 @@ project(simpc) set(CMAKE_EXPORT_COMPILE_COMMANDS ON) -find_package(verilator HINTS $ENV{VERILATOR_ROOT}) +find_package(verilator REQUIRED HINTS $ENV{VERILATOR_ROOT}) find_package(Curses) find_package(FLTK) diff --git a/nandgame/cpp/Vcomputer__main.cpp b/nandgame/cpp/Vcomputer__main.cpp index 77e291f..a09deea 100644 --- a/nandgame/cpp/Vcomputer__main.cpp +++ b/nandgame/cpp/Vcomputer__main.cpp @@ -57,7 +57,7 @@ int main(int argc, char **argv, char **) { !topp->halt) { auto i = contextp->time(); - if (i != 0 && (i % TICKS_PER_INS) == 0) { + if (i != 0 && (i % TICKS_PER_CLOCK_PERIOD) == 0) { topp->clk_in = !topp->clk_in; } diff --git a/nandgame/cpp/simpc_config.h b/nandgame/cpp/simpc_config.h index 39ad7b5..d021861 100644 --- a/nandgame/cpp/simpc_config.h +++ b/nandgame/cpp/simpc_config.h @@ -1,4 +1,4 @@ #pragma once -#define TICKS_PER_INS 2 +#define TICKS_PER_CLOCK_PERIOD 1 #define NCUR_DELAY_MS 10 diff --git a/nandgame/cpp/simpc_ui.cpp b/nandgame/cpp/simpc_ui.cpp index 64d799d..c87c62e 100644 --- a/nandgame/cpp/simpc_ui.cpp +++ b/nandgame/cpp/simpc_ui.cpp @@ -2,6 +2,7 @@ #include "simpc_config.h" #include "disas.h" +#include <cassert> #define MEMORY_CONTEXT 3 @@ -16,6 +17,7 @@ if (resized) { \ /* ????*/ \ resized = 0; \ + clear(); \ } \ refresh(); \ wrefresh(status_top); \ @@ -174,13 +176,6 @@ void simpc_ui_init(void) { RAM2 = newwin(numlines, 15, 10, romwidth + ram1width); wrefresh(RAM2); - int rc; - - rc = wresize(stdscr, getmaxy(stdscr) - 3, getmaxx(stdscr)); - assert(rc == 0); - rc = mvwin(stdscr, 3, 0); - assert(rc == 0); - nodelay(stdscr, TRUE); noecho(); cbreak(); diff --git a/nandgame/hack_alu.sv b/nandgame/hack_alu.sv index 8ece81a..6d66a08 100644 --- a/nandgame/hack_alu.sv +++ b/nandgame/hack_alu.sv @@ -2,12 +2,8 @@ `timescale 1us/1us -`include "nandgame_types.v" -`include "arith_unit.sv" -`include "logic_unit.sv" - -`ifndef NANDGAME_ALU -`define NANDGAME_ALU +`ifndef HACK_ALU +`define HACK_ALU // See fig. 2.6 in book module alu #( @@ -41,26 +37,33 @@ module alu #( output logic negate_out ); -logic [(DATA_WIDTH-1):0] int_op_x /* verilator public */; -logic [(DATA_WIDTH-1):0] int_op_y /* verilator public */; +logic [(DATA_WIDTH-1):0] x1, x2, y1, y2, res1, res2 /* verilator public */; // logic [(DATA_WIDTH-1):0] int_result_arith; // logic [(DATA_WIDTH-1):0] int_result_logic; -// assign int_op_x = zx_in ? 0 -// : (sw_in ? Y_in : X_in); -// assign int_op_y = sw_in ? X_in : Y_in; +// bit-wise negation +assign x1 = zx ? 0 : X_in; +assign y1 = zy ? 0 : Y_in; +assign x2 = nx ? ~x1 : x1; +assign y2 = ny ? ~y1 : y1; +assign res1 = f_arith_nlogic_in ? (x2 + y2) : (x2 & y2); +assign res2 = neg_out ? ~res1 : res1; +assign result_out = res2; +assign zero_out = result_out == 0; +assign negate_out = result_out[DATA_WIDTH-1] == 1; +// assign y1 = sw_in ? X_in : Y_in; // arith_unit au ( -// .X_in(int_op_x), -// .Y_in(int_op_y), +// .X_in(x1), +// .Y_in(y1), // .result_out(int_result_arith), // .arith_operation_in(ArithCode'(opcode_in)) // ); // logic_unit lu ( -// .X_in(int_op_x), -// .Y_in(int_op_y), +// .X_in(x1), +// .Y_in(y1), // .result_out(int_result_logic), // .logic_operation_in(LogicCode'(opcode_in)) // ); |