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-rw-r--r--eater_cpu/cpp/Veater_computer__main.cpp3
-rw-r--r--eater_cpu/cpp/simpc_term.cpp8
-rw-r--r--eater_cpu/eater_decoder.sv14
-rw-r--r--eater_cpu/eater_types.sv6
-rw-r--r--eater_cpu/readme.txt1
5 files changed, 31 insertions, 1 deletions
diff --git a/eater_cpu/cpp/Veater_computer__main.cpp b/eater_cpu/cpp/Veater_computer__main.cpp
index c415454..fbfc978 100644
--- a/eater_cpu/cpp/Veater_computer__main.cpp
+++ b/eater_cpu/cpp/Veater_computer__main.cpp
@@ -24,6 +24,9 @@ void load_program(const std::unique_ptr<Veater_computer> &topp) {
0x2f,
// SUB 13
0x3d,
+ // STA 12
+ 0x4c,
+
// OUT
0xe0,
// NOP
diff --git a/eater_cpu/cpp/simpc_term.cpp b/eater_cpu/cpp/simpc_term.cpp
index c08deed..2ac3895 100644
--- a/eater_cpu/cpp/simpc_term.cpp
+++ b/eater_cpu/cpp/simpc_term.cpp
@@ -1,4 +1,5 @@
#include "Veater_computer_eater_register.h"
+#include "Veater_computer_my_mem__DB10.h"
#include "simpc_ui.h"
#define NCUR_X 5
@@ -35,7 +36,7 @@ static void handle_key();
void simpc_ui_write(const std::unique_ptr<Veater_computer> &topp, uint64_t i) {
// clk hi->lo doesn't do anything, just skip this.
- if (i !=0 && !topp->clk_in)
+ if (i != 0 && !topp->clk_in)
return;
// uint16_t opcode = topp->eater_computer->;
uint8_t opcode = topp->eater_computer->INS->r_datastore;
@@ -109,6 +110,11 @@ void simpc_ui_finish_message(const std::unique_ptr<VerilatedContext> &contextp,
PRINT_ME_W(status_top, 1, xpos, "%s", msg);
attroff(A_BOLD);
+
+ for (int idx = 0; idx < topp->eater_computer->RAM->r_datastore.size();
+ idx++) {
+ printf("Mem[%2d] = 0X%02X\n", idx, topp->eater_computer->RAM->r_datastore[idx]);
+ }
}
void simpc_ui_init(void) {}
diff --git a/eater_cpu/eater_decoder.sv b/eater_cpu/eater_decoder.sv
index ad0fd52..fea00e0 100644
--- a/eater_cpu/eater_decoder.sv
+++ b/eater_cpu/eater_decoder.sv
@@ -29,6 +29,7 @@ function CpuState insdep_state;
LDA: insdep_state = LDA_INS_to_MAR;
ADD: insdep_state = ADD_INS_to_MAR;
SUB: insdep_state = SUB_INS_to_MAR;
+ STA: insdep_state = STA_INS_to_MAR;
OUT: insdep_state = OUT_A_to_OUT;
HALT_op: insdep_state = HALT_st;
@@ -61,6 +62,9 @@ always @(posedge clk_i) begin
SUB_MEM_to_B: next_state = SUB_ALU_to_A;
SUB_ALU_to_A: next_state = PC_to_MAR;
+ STA_INS_to_MAR: next_state = STA_A_to_MEM;
+ STA_A_to_MEM: next_state = PC_to_MAR;
+
OUT_A_to_OUT: next_state = PC_to_MAR;
HALT_st: next_state = HALT_st;
@@ -139,6 +143,16 @@ always_comb begin
internal_flags.A_in = 1;
end
+ STA_INS_to_MAR: begin
+ internal_flags.INS_out = 1;
+ internal_flags.MAR_in = 1;
+ end
+
+ STA_A_to_MEM: begin
+ internal_flags.RAM_in = 1;
+ internal_flags.A_out = 1;
+ end
+
OUT_A_to_OUT: begin
internal_flags.A_out = 1;
internal_flags.OUT_in = 1;
diff --git a/eater_cpu/eater_types.sv b/eater_cpu/eater_types.sv
index a39977e..6f69b4b 100644
--- a/eater_cpu/eater_types.sv
+++ b/eater_cpu/eater_types.sv
@@ -39,6 +39,11 @@ typedef enum logic[7:0] {
// SUB: c) ALU -> A
SUB_ALU_to_A,
+ // STA: a) LSB of INStruction into MAR
+ STA_INS_to_MAR,
+ // STA: b) A -> MEM
+ STA_A_to_MEM,
+
// OUT: A -> OUT
OUT_A_to_OUT,
@@ -51,6 +56,7 @@ typedef enum logic[3:0] {
LDA = 'b0001,
ADD = 'b0010,
SUB = 'b0011,
+ STA = 'b0100,
OUT = 'b1110,
HALT_op = 'b1111
} eater_instruction;
diff --git a/eater_cpu/readme.txt b/eater_cpu/readme.txt
index b75a00c..402f0bb 100644
--- a/eater_cpu/readme.txt
+++ b/eater_cpu/readme.txt
@@ -32,6 +32,7 @@ NOP ____________ 0b_0000_xxxx No-op
LDA <memaddress> 0b_0001_<memaddress> Load memory > A
ADD <memaddress> 0b_0010_<memaddress> "Add memory": mem>B, A + B -> A
SUB <memaddress> 0b_0011_<memaddress> "Sub memory": mem>B, A - B-> A
+STA <memaddress> 0b_0100_<memaddress> Store A -> memory
OUT ____________ 0b_1110_xxxx Output A -> OUT
HLT ____________ 0b_1111_xxxx Sets halt flag
---