22 files changed, 34 insertions, 10 deletions
diff --git a/clkdiv.v b/clkdiv.v
index 5730d19..b6f1419 100644
--- a/clkdiv.v
+++ b/clkdiv.v
@@ -1,3 +1,5 @@
+`timescale 1us/1us
+
 module clkdiv (
     input rst_i,
     input clk,              // clk input
diff --git a/debounce.tb.v b/debounce.tb.v
index f95bd9b..ba90aa7 100644
--- a/debounce.tb.v
+++ b/debounce.tb.v
@@ -1,4 +1,4 @@
-`timescale 1us/1ns
+`timescale 1us/1us
 
 module debounce_tb (
 );
diff --git a/debounce.v b/debounce.v
index e16ea37..33dc22e 100644
--- a/debounce.v
+++ b/debounce.v
@@ -1,3 +1,5 @@
+`timescale 1us/1us
+
 module debounce (
   input rst_i,
   input clk_i,
diff --git a/fifo.tb.v b/fifo.tb.v
index 6556eca..58fc084 100644
--- a/fifo.tb.v
+++ b/fifo.tb.v
@@ -1,4 +1,4 @@
-`timescale 1us/1ns
+`timescale 1us/1us
 
 module fifo_tb (
 );
diff --git a/fifo.v b/fifo.v
index b8ddb0f..eaaa8a8 100644
--- a/fifo.v
+++ b/fifo.v
@@ -1,3 +1,5 @@
+`timescale 1us/1us
+
 module fifo #(
   parameter DATA_WIDTH = 8,
   parameter DATA_DEPTH = 1024
diff --git a/fizzbuzz.tb.v b/fizzbuzz.tb.v
index 71acd39..54095cc 100644
--- a/fizzbuzz.tb.v
+++ b/fizzbuzz.tb.v
@@ -1,4 +1,4 @@
-`timescale 1us/1ns
+`timescale 1us/1us
 
 module fizzbuzz_tb (
 );
diff --git a/fizzbuzz.v b/fizzbuzz.v
index 4aa079a..9dd215f 100644
--- a/fizzbuzz.v
+++ b/fizzbuzz.v
@@ -1,3 +1,5 @@
+`timescale 1us/1us
+
 module fizzbuzz (
   input clk_i,
   input [7:0] num_i,
diff --git a/led.v b/led.v
index 2b506e5..e4f4281 100644
--- a/led.v
+++ b/led.v
@@ -1,3 +1,5 @@
+`timescale 1us/1us
+
 `include "clkdiv.v"
 
 module led (
diff --git a/led_toggle.tb.v b/led_toggle.tb.v
index 436ac24..95bfe7d 100644
--- a/led_toggle.tb.v
+++ b/led_toggle.tb.v
@@ -1,4 +1,4 @@
-`timescale 1us/1ns
+`timescale 1us/1us
 
 module led_toggle_tb (
 );
diff --git a/led_toggle.v b/led_toggle.v
index e82f8e3..3c54ee4 100644
--- a/led_toggle.v
+++ b/led_toggle.v
@@ -1,3 +1,5 @@
+`timescale 1us/1us
+
 // From the book
 // bouncy variant
 
diff --git a/led_toggle_bouncy.tb.v b/led_toggle_bouncy.tb.v
index 78fb06d..222879b 100644
--- a/led_toggle_bouncy.tb.v
+++ b/led_toggle_bouncy.tb.v
@@ -1,4 +1,4 @@
-`timescale 1us/1ns
+`timescale 1us/1us
 
 module led_toggle_bouncy_tb (
 );
diff --git a/led_toggle_bouncy.v b/led_toggle_bouncy.v
index 7ac8a9d..b05b472 100644
--- a/led_toggle_bouncy.v
+++ b/led_toggle_bouncy.v
@@ -1,3 +1,5 @@
+`timescale 1us/1us
+
 // From the book
 // bouncy variant
 
diff --git a/led_toggle_nonwork.v b/led_toggle_nonwork.v
index a8e9b78..5fe458f 100644
--- a/led_toggle_nonwork.v
+++ b/led_toggle_nonwork.v
@@ -1,3 +1,5 @@
+`timescale 1us/1us
+
 // 
 // NON-WORKING
 // LED toggle example
diff --git a/par_to_ser.tb.v b/par_to_ser.tb.v
index 4242d37..f6f3d7c 100644
--- a/par_to_ser.tb.v
+++ b/par_to_ser.tb.v
@@ -1,4 +1,4 @@
-`timescale 1us/1ns
+`timescale 1us/1us
 
 module par_to_ser_tb (
 );
diff --git a/par_to_ser.v b/par_to_ser.v
index e817608..ab754c9 100644
--- a/par_to_ser.v
+++ b/par_to_ser.v
@@ -1,3 +1,5 @@
+`timescale 1us/1us
+
 // parallel to serial converter
 
 module par_to_ser #(
diff --git a/par_to_ser_to_ser.tb.v b/par_to_ser_to_ser.tb.v
index eac1589..1f30ae2 100644
--- a/par_to_ser_to_ser.tb.v
+++ b/par_to_ser_to_ser.tb.v
@@ -1,7 +1,7 @@
 // converts back and forth
 // parallel > serial > parallel
 
-`timescale 1us/1ns
+`timescale 1us/1us
 
 module par_to_ser_tb (
 );
diff --git a/ser_to_par.tb.v b/ser_to_par.tb.v
index eb45094..ffa4172 100644
--- a/ser_to_par.tb.v
+++ b/ser_to_par.tb.v
@@ -1,4 +1,4 @@
-`timescale 1us/1ns
+`timescale 1us/1us
 
 module ser_to_par_tb (
 );
diff --git a/ser_to_par.v b/ser_to_par.v
index f690780..f0a0c47 100644
--- a/ser_to_par.v
+++ b/ser_to_par.v
@@ -1,3 +1,5 @@
+`timescale 1us/1us
+
 // serial to parallel converter
 // Learning:
 // I don't like this.
diff --git a/template.tb.v b/template.tb.v
index a633fcb..5cf5e54 100644
--- a/template.tb.v
+++ b/template.tb.v
@@ -1,4 +1,4 @@
-`timescale 1us/1ns
+`timescale 1us/1us
 
 module template_tb (
 );
diff --git a/template.v b/template.v
index b5cb7c8..e6f5280 100644
--- a/template.v
+++ b/template.v
@@ -1,3 +1,5 @@
+`timescale 1us/1us
+
 module template (
   input rst_i,
   input clk_i
diff --git a/tst_delay.tb.v b/tst_delay.tb.v
index d46c8c3..835c93a 100644
--- a/tst_delay.tb.v
+++ b/tst_delay.tb.v
@@ -1,5 +1,5 @@
 // try to figure out how iverilog samples edges
-`timescale 1us/1ns
+`timescale 1us/1us
 
 module template_tb (
 );
diff --git a/tst_delay.v b/tst_delay.v
index fbc7c85..c4017bd 100644
--- a/tst_delay.v
+++ b/tst_delay.v
@@ -1,3 +1,5 @@
+`timescale 1us/1us
+
 module tst_delay (
   input clk_i,
   input data_i,