diff options
| -rw-r--r-- | eater_cpu/eater_types.sv | 7 | ||||
| -rw-r--r-- | eater_cpu/readme.txt | 10 |
2 files changed, 15 insertions, 2 deletions
diff --git a/eater_cpu/eater_types.sv b/eater_cpu/eater_types.sv index 6098744..9c8945c 100644 --- a/eater_cpu/eater_types.sv +++ b/eater_cpu/eater_types.sv @@ -9,6 +9,13 @@ typedef enum logic[7:0] { INIT, PC_to_MAR, MEM_to_INS, + // Note: + // The Ben Eater CPU combines these steps. However. + // I got probably a bug in my state machine, + // or clock in the data differently, + // but if I combine the steps, I'm trying to get + // the instruction-dependent next state before + // the INS is actually loaded. whoops. PC_inc, // instruction dependent states diff --git a/eater_cpu/readme.txt b/eater_cpu/readme.txt index aa72328..44fe1b1 100644 --- a/eater_cpu/readme.txt +++ b/eater_cpu/readme.txt @@ -40,8 +40,14 @@ operation Increment PC. a) PC out -> MAR (PC_to_bus) + (bus_to_MAR) + (clk) - b) MEM -> INS, PC++ - (RAM_to_bus) + (bus_to_INS) + (PC_count_en) + (clk) + b) MEM -> INS + (RAM_to_bus) + (bus_to_INS) + (clk) + c) PC++ + (PC_count_en) + (clk) + + NOTE: + Yes, I know Ben Eaters computer combines b and c. + See eater_types for details. 2. Decode and execute instruction. |