diff options
| -rw-r--r-- | led.v | 8 | ||||
| -rw-r--r-- | led_toggle.v | 3 |
2 files changed, 5 insertions, 6 deletions
@@ -3,7 +3,7 @@ module led ( input clk, // clk input input rst_i, // reset input - output reg [5:0] led // 6 LEDS pin + output reg [5:0] led_o // 6 LEDS pin ); reg half_sec_clock; @@ -16,12 +16,12 @@ clkdiv half_sec_divider( always @(posedge half_sec_clock or negedge rst_i) begin if (!rst_i) - led <= 6'b111111; + led_o <= 6'b111111; else // else if (counter == 24'd1349_9999) // 0.5s delay - led[5:0] <= led[5:0] - 1; + led_o[5:0] <= led_o[5:0] - 1; // else -// led <= led; +// led_o <= led_o; end diff --git a/led_toggle.v b/led_toggle.v index df86bf8..e82f8e3 100644 --- a/led_toggle.v +++ b/led_toggle.v @@ -14,13 +14,12 @@ parameter STABLE_PERIOD = 50; wire outsig; -debounce db( +debounce #(.STABLE_PERIOD(STABLE_PERIOD)) db( .rst_i(rst_i), .clk_i(clk_i), .signal_i(key_i), .signal_o(outsig) ); -defparam db.STABLE_PERIOD = STABLE_PERIOD; led_toggle_bouncy tgler( .clk_i(clk_i), |