diff options
Diffstat (limited to 'eater_cpu/eater_computer_tb.sv')
| -rw-r--r-- | eater_cpu/eater_computer_tb.sv | 82 |
1 files changed, 41 insertions, 41 deletions
diff --git a/eater_cpu/eater_computer_tb.sv b/eater_cpu/eater_computer_tb.sv index 47ef16f..019bcb1 100644 --- a/eater_cpu/eater_computer_tb.sv +++ b/eater_cpu/eater_computer_tb.sv @@ -24,20 +24,20 @@ initial begin $dumpfile("simpc.vvp"); $dumpvars(); - uut.A_to_bus = 0; - uut.B_to_bus = 0; - uut.INS_to_bus = 0; - uut.ALU_to_bus = 0; - uut.RAM_to_bus = 0; - uut.PC_to_bus = 0; - uut.PC_count_en = 0; - - uut.bus_to_A = 0; - uut.bus_to_B = 0; - uut.bus_to_INS = 0; - uut.bus_to_RAM = 0; - uut.bus_to_PC = 0; - uut.bus_to_MAR = 0; + uut.flags.A_out = 0; + uut.flags.B_out = 0; + uut.flags.INS_out = 0; + uut.flags.ALU_out = 0; + uut.flags.RAM_out = 0; + uut.flags.PC_out = 0; + uut.flags.PC_count = 0; + + uut.flags.A_in = 0; + uut.flags.B_in = 0; + uut.flags.INS_in = 0; + uut.flags.RAM_in = 0; + uut.flags.PC_in = 0; + uut.flags.MAR_in = 0; clk_in = 0; debug_enable = 0; debug_value = 'z; @@ -52,91 +52,91 @@ initial begin @(negedge clk_in); debug_value = 'h00; - uut.bus_to_MAR = 1; + uut.flags.MAR_in = 1; @(negedge clk_in); - uut.bus_to_MAR = 0; + uut.flags.MAR_in = 0; debug_value = 'h04; - uut.bus_to_PC = 1; + uut.flags.PC_in = 1; @(negedge clk_in); - uut.bus_to_PC = 0; + uut.flags.PC_in = 0; debug_value = 'haa; - uut.bus_to_A = 1; + uut.flags.A_in = 1; @(negedge clk_in); - uut.bus_to_A = 0; + uut.flags.A_in = 0; debug_value = 'hbb; - uut.bus_to_B = 1; + uut.flags.B_in = 1; @(negedge clk_in); - uut.bus_to_B = 0; + uut.flags.B_in = 0; debug_value = 'hcc; - uut.bus_to_INS = 1; + uut.flags.INS_in = 1; @(negedge clk_in); - uut.bus_to_INS = 0; + uut.flags.INS_in = 0; debug_value = 'hdd; - uut.bus_to_RAM = 1; + uut.flags.RAM_in = 1; @(negedge clk_in); - uut.bus_to_RAM = 0; + uut.flags.RAM_in = 0; @(negedge clk_in); debug_enable = 0; debug_value = 'z; @(negedge clk_in); - uut.A_to_bus = 1; + uut.flags.A_out = 1; @(negedge clk_in); assert (uut.bus == 'haa) else $error("Expected 0xaa (from REG A), got 0x%02x on bus", uut.bus); - uut.A_to_bus = 0; - uut.B_to_bus = 1; + uut.flags.A_out = 0; + uut.flags.B_out = 1; @(negedge clk_in); assert (uut.bus == 'hbb) else $error("Expected 0xbb (from REG B), got 0x%02x on bus", uut.bus); - uut.B_to_bus = 0; - uut.INS_to_bus = 1; + uut.flags.B_out = 0; + uut.flags.INS_out = 1; @(negedge clk_in); assert (uut.bus == 'h0c) else $error("Expected 0x0c (from INS), got 0x%02x on bus", uut.bus); // ERROR: TODO: should I expect 'zc or '0c ? - uut.INS_to_bus = 0; + uut.flags.INS_out = 0; @(negedge clk_in); - uut.ALU_to_bus = 1; + uut.flags.ALU_out = 1; @(negedge clk_in); assert (uut.bus == 8'('haa + 'hbb)) else $error("Expected 0x%02x (from ALU), got 0x%02x on bus", 8'('haa + 'hbb), uut.bus); - uut.ALU_to_bus = 0; - uut.PC_to_bus = 1; + uut.flags.ALU_out = 0; + uut.flags.PC_out = 1; @(negedge clk_in); assert (uut.bus == 'h04) else $error("Expected 0x04 (from PC), got 0x%02x on bus", uut.bus); - uut.PC_to_bus = 0; - uut.RAM_to_bus = 1; + uut.flags.PC_out = 0; + uut.flags.RAM_out = 1; @(negedge clk_in); assert (uut.bus == 'hdd) else $error("Expected 0xdd (from RAM), got 0x%02x on bus", uut.bus); - uut.RAM_to_bus = 0; + uut.flags.RAM_out = 0; @(negedge clk_in); debug_enable = 1; debug_value = 'h01; - uut.bus_to_MAR = 1; + uut.flags.MAR_in = 1; @(negedge clk_in); debug_enable = 0; debug_value = 'bz; - uut.bus_to_MAR = 0; - uut.RAM_to_bus = 1; + uut.flags.MAR_in = 0; + uut.flags.RAM_out = 1; @(negedge clk_in); $info("Got 0x%02x from RAM", uut.bus); |