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Diffstat (limited to 'nandgame/cpp/Vcomputer__main.cpp')
| -rw-r--r-- | nandgame/cpp/Vcomputer__main.cpp | 177 |
1 files changed, 177 insertions, 0 deletions
diff --git a/nandgame/cpp/Vcomputer__main.cpp b/nandgame/cpp/Vcomputer__main.cpp new file mode 100644 index 0000000..f857be1 --- /dev/null +++ b/nandgame/cpp/Vcomputer__main.cpp @@ -0,0 +1,177 @@ +// Verilated -*- C++ -*- +// DESCRIPTION: Verilator output: main() simulation loop, created with --main + +#include "Vcomputer___024root.h" +#include "Vcomputer_alu.h" +#include "Vcomputer_computer.h" +#include "Vcomputer_instruction_decode.h" +#include "Vcomputer_my_mem__D10_DB10000.h" +#include "verilated.h" +#include "Vcomputer.h" +#include <cinttypes> +#include <cstdint> +#include <cstdio> +#include <sched.h> + +#define TICKS_PER_INS 2 +#define NCUR 1 +#include "disas.h" + +#define NCUR_OFFSET 3 + +#if NCUR +#include <ncurses.h> +#define NCUR_DELAY_MS 100 +#define NCUR_X 5 + +#define PRINT_ME(x, y, ...) { mvprintw(x, y, __VA_ARGS__); } +#define PRINT_NEXT() { refresh(); napms(NCUR_DELAY_MS); } + +#else + +#define PRINT_ME(x, y, ...) { printf("%*s", x, ""); printf(__VA_ARGS__); printf("\n"); } +#define PRINT_NEXT() { puts("-----"); } + +#endif + +//====================== + +enum class StepPosition_t { + BEFORE_EVAL, + AFTER_EVAL +}; + +void draw_ui(const std::unique_ptr<Vcomputer> &topp, int &i, StepPosition_t sp) { + uint16_t opcode = topp->computer->PC_content_int; + + PRINT_ME(1, 1, "Step: %10d \b%c", i, sp == StepPosition_t::BEFORE_EVAL ? 'A' : 'B'); + PRINT_ME(1 + NCUR_OFFSET, NCUR_X, "CLK1: %4d\tPC: @0x%04X\tINS: 0x%04X\tHLT: %d", + topp->clk_in, + // wrong + // topp->computer->clk_in, + topp->computer->PC_addr_int, opcode, + topp->halt + ); + + auto insline = print_decoded(opcode, true); + PRINT_ME(3 + NCUR_OFFSET, NCUR_X, "%-80s", insline.c_str()); + + // keep old state + if (topp->halt) + return; + + PRINT_ME(5 + NCUR_OFFSET, NCUR_X, + "A: 0x%04X\tD: 0x%04X\tM: 0x%04X\tRES: 0x%04X", + topp->computer->reg_A_int, topp->computer->reg_D_int, + topp->computer->reg_pA_int, topp->computer->result_int); + PRINT_ME(6 + NCUR_OFFSET, NCUR_X, + "%9" PRId16 "\t%9" PRId16 "\t%9" PRId16 "\t%11" PRId16, + topp->computer->reg_A_int, topp->computer->reg_D_int, + topp->computer->reg_pA_int, topp->computer->result_int); + PRINT_ME(7 + NCUR_OFFSET, NCUR_X, "ALU"); + PRINT_ME(8 + NCUR_OFFSET, NCUR_X, "X: %5" PRId16 "\tY: %5" PRId16, + topp->computer->CPU->my_alu->int_op_x, + topp->computer->CPU->my_alu->int_op_y) + + PRINT_NEXT(); +} + +int main(int argc, char **argv, char **) { + + // Setup context, defaults, and parse command line + Verilated::debug(0); + const std::unique_ptr<VerilatedContext> contextp{new VerilatedContext}; + Verilated::traceEverOn(true); + contextp->threads(1); + contextp->commandArgs(argc, argv); + + // Construct the Verilated model, from Vtop.h generated from Verilating + const std::unique_ptr<Vcomputer> topp{new Vcomputer{contextp.get(), ""}}; + + if (argc != 2) { + fprintf(stderr, "Usage: %.20s [filename]\n\n", argv[0]); + exit(-1); + } + int i = 0; + puts("Start simulation."); + // topp->computer->clk_in = 0; + topp->clk_in = 0; + FILE *f = fopen(argv[1], "rb"); + if (!f) { + fprintf(stderr, "Program file %.20s not found.\n", argv[1]); + exit(-1); + } + fseek(f, 0, SEEK_END); + long fpos = ftell(f); + fseek(f, 0, SEEK_SET); + size_t bytes_read = + fread(topp->computer->ROM->r_datastore.m_storage, 2, fpos / 2, f); + + if (bytes_read * 2 != fpos) { + fputs("Couldn't read program file completely.", stderr); + exit(-1); + } + +#if NCUR + initscr(); + curs_set(0); +#endif + + while (VL_LIKELY(!contextp->gotFinish()) && i < 500) { + // doesn't work. + // topp->computer->clk_in = ~topp->computer->clk_in; + + if (i != 0 && (i % TICKS_PER_INS) == 0) { + topp->clk_in = !topp->clk_in; + } + + draw_ui(topp, i, StepPosition_t::BEFORE_EVAL); + + // Evaluate model + topp->eval(); + + // both bits 14 and 15 need to be set + if (topp->halt) + break; + + draw_ui(topp, i, StepPosition_t::AFTER_EVAL); + + // Advance time + contextp->timeInc(1); + i++; + } + +#if NCUR + refresh(); +#endif + + PRINT_ME(10 + NCUR_OFFSET, 10, "Simulation finished."); + if (topp->halt) { + PRINT_ME(11 + NCUR_OFFSET, 10, "Halt encountered."); + } else if (!contextp->gotFinish()) { + PRINT_ME(11 + NCUR_OFFSET, 10, "Step count exceeded."); + } else { + PRINT_ME(11 + NCUR_OFFSET, 10, "Regular finish."); + } + + if (VL_LIKELY(!contextp->gotFinish())) { + VL_DEBUG_IF(VL_PRINTF("+ Exiting without $finish; no events left\n");); + } + + // for tracefile to properly show + for (int i = 0; i < 10; i++) { + contextp->timeInc(1); + topp->eval(); + } + // Execute 'final' processes + topp->final(); + + // Print statistical summary report + //contextp->statsPrintSummary(); + +#if NCUR + getch(); endwin(); +#endif + + return 0; +} |