diff options
Diffstat (limited to 'nandgame/cpp/simpc_ui.cpp')
| -rw-r--r-- | nandgame/cpp/simpc_ui.cpp | 71 |
1 files changed, 35 insertions, 36 deletions
diff --git a/nandgame/cpp/simpc_ui.cpp b/nandgame/cpp/simpc_ui.cpp index 0eaebd5..dcb7300 100644 --- a/nandgame/cpp/simpc_ui.cpp +++ b/nandgame/cpp/simpc_ui.cpp @@ -3,7 +3,6 @@ #include "disas.h" -#define NCUR_X 5 #define MEMORY_CONTEXT 3 #include <ncurses.h> @@ -12,12 +11,14 @@ { mvprintw(y, x, __VA_ARGS__); } #define PRINT_ME_W(w, y, x, ...) \ { mvwprintw(w, y, x, __VA_ARGS__); } -// refresh(); #define PRINT_NEXT(dly) \ { \ + refresh(); \ wrefresh(status_top); \ wrefresh(clock_regs); \ wrefresh(ROM); \ + wrefresh(RAM1); \ + wrefresh(RAM2); \ if (dly) { \ napms(NCUR_DELAY_MS); \ } \ @@ -54,65 +55,61 @@ void simpc_ui_write(const std::unique_ptr<Vcomputer> &topp, uint64_t &i, sp == StepPosition_t::BEFORE_EVAL ? 'A' : 'B'); PRINT_ME_W(status_top, 2, 1, "%-20s", paused ? "Paused" : "Running"); - PRINT_ME_W(clock_regs, 1, NCUR_X, - "CLK: %4d\tPC: 0x%04X\tINS: 0x%04X\tHLT: %6d", topp->clk_in, + PRINT_ME_W(clock_regs, 1, 1, "CLK: %4d\tPC: 0x%04X\tINS: 0x%04X\tHLT: %6d", + topp->clk_in, // wrong // topp->computer->clk_in, topp->computer->PC_addr_int, opcode, topp->halt); - PRINT_ME_W(clock_regs, 2, NCUR_X, + PRINT_ME_W(clock_regs, 2, 1, "A: 0x%04X\tD: 0x%04X\tM: 0x%04X\tRES: 0x%04X", topp->computer->reg_A_int, topp->computer->reg_D_int, topp->computer->reg_pA_int, topp->computer->result_int); PRINT_ME_W( - clock_regs, 3, NCUR_X, "%c%8d\t%c %8d\t%c %8d\t%11d", + clock_regs, 3, 1, "%c%8d\t%c %8d\t%c %8d\t%11d", topp->computer->store_to_A_int ? '*' : ' ', topp->computer->reg_A_int, topp->computer->store_to_D_int ? '*' : ' ', topp->computer->reg_D_int, topp->computer->store_to_pA_int ? '*' : ' ', topp->computer->reg_pA_int, topp->computer->result_int); - const int ram1_pos_offset = 35 + 1; - const int ram2_pos_offset = ram1_pos_offset + 14 + 1; - - SIMPLE_BORDER(ROM, '!', '~', 'X'); - PRINT_ME_W(ROM, 0, NCUR_X, "%-35s", "--- ROM ---"); - PRINT_ME(10, NCUR_X + ram1_pos_offset, "%-35s", "--- RAM1 ---"); - PRINT_ME(10, NCUR_X + ram2_pos_offset, "%-35s", "-- RAM2 --"); + SIMPLE_BORDER(ROM, '|', '-', '+'); + PRINT_ME_W(ROM, 0, 1, "%-35s", "--- ROM ---"); + PRINT_ME_W(RAM1, 0, 1, "%-15s", "--- RAM1 ---"); + PRINT_ME_W(RAM2, 0, 1, "%-15s", "-- RAM2 --"); for (int i = -MEMORY_CONTEXT; i <= MEMORY_CONTEXT; i++) { - const int ypos_base = 10 + 1 + MEMORY_CONTEXT; + const int ypos_base = 1 + MEMORY_CONTEXT; const char *prefix = i == 0 ? "> " : " "; int32_t current_ROM_address = topp->computer->PC_addr_int + i; int32_t current_RAM_address = topp->computer->reg_A_int + i; if (current_ROM_address < 0) { PRINT_ME_W( - ROM, 1 + MEMORY_CONTEXT + i, NCUR_X, "%.35s", + ROM, ypos_base + i, 1, "%.35s", "---------------------------------------------------------------"); } else { const uint16_t p = current_ROM_address; const uint16_t program_op_code = topp->computer->ROM->r_datastore[p]; auto disas_code = print_decoded(program_op_code, true); - PRINT_ME_W(ROM, 1 + MEMORY_CONTEXT + i, NCUR_X, "%04X %s%04X %-30s", + PRINT_ME_W(ROM, ypos_base + i, 1, "%04X %s%04X %-30s", current_ROM_address, prefix, program_op_code, disas_code.c_str()); // mvchgat in bold } if (current_RAM_address < 0) { - PRINT_ME( - ypos_base + i, NCUR_X + ram1_pos_offset, "%.12s", + PRINT_ME_W( + RAM1, ypos_base + i, 1, "%.12s", "---------------------------------------------------------------"); } else { const uint16_t p = current_RAM_address; const uint16_t mem_content = topp->computer->RAM->nand_memory->r_datastore[p]; - PRINT_ME(ypos_base + i, NCUR_X + ram1_pos_offset, "%04X %s%04X", - current_RAM_address, prefix, mem_content); + PRINT_ME_W(RAM1, ypos_base + i, 1, "%04X %s%04X", current_RAM_address, + prefix, mem_content); } { const uint16_t p = MEMORY_CONTEXT + i; const uint16_t mem_content = topp->computer->RAM->nand_memory->r_datastore[p]; - PRINT_ME(ypos_base + i, NCUR_X + ram2_pos_offset, "%04X %04X%30c", p, - mem_content, ' '); + PRINT_ME_W(RAM2, ypos_base + i, 1, "%04X %04X%30c", p, mem_content, ' '); } } // PRINT_ME(7 + NCUR_OFFSET, NCUR_X, "ALU"); @@ -153,15 +150,19 @@ void simpc_ui_init(void) { // lines, cols, ypos, xpos status_top = newwin(4, 50, 0, 0); - SIMPLE_BORDER(status_top, '!', '~', 'X'); wrefresh(status_top); clock_regs = newwin(5, 80, 3, 0); - SIMPLE_BORDER(clock_regs, '!', '~', 'X'); wrefresh(clock_regs); - ROM = newwin(7, 40, 10, 0); - SIMPLE_BORDER(ROM, '!', '~', 'X'); + auto numlines = 1 + 2 * MEMORY_CONTEXT + 2; + auto romwidth = 41; + auto ram1width = 16; + ROM = newwin(numlines, romwidth, 10, 0); wrefresh(ROM); - wgetch(ROM); + // non-overlapping + RAM1 = newwin(numlines, ram1width, 10, romwidth); + wrefresh(RAM1); + RAM2 = newwin(numlines, 15, 10, romwidth + ram1width); + wrefresh(RAM2); int rc; @@ -170,7 +171,6 @@ void simpc_ui_init(void) { rc = mvwin(stdscr, 3, 0); assert(rc == 0); - SIMPLE_BORDER(stdscr, '|', '-', '+'); nodelay(stdscr, TRUE); noecho(); cbreak(); @@ -183,15 +183,14 @@ void simpc_ui_cleanup(void) { nocbreak(); echo(); - if (status_top) { - delwin(status_top); - } - if (clock_regs) { - delwin(clock_regs); - } - if (ROM) { - delwin(ROM); + auto ws = {status_top, clock_regs, ROM, RAM1, RAM2}; + + for (auto &w : ws) { + if (w) { + delwin(w); + } } + endwin(); #endif } |
