fpga-exper - FPGA experiments

Age	Commit message (Expand)	Author
8 days	Add instruction register	uvok
8 days	allow capital letters start in symbol names	uvok
8 days	assembler: Avoid NoneError	uvok
8 days	eater: reg data out en is async	uvok
8 days	Add 1st sketch of eater cpu	uvok
8 days	hack: Fix verilator annotation	uvok
8 days	Fix issues, linting, use argparse, with other py exes	uvok
8 days	Fix name of assembler. usage	uvok
8 days	Encapsulate parser, only access functions	uvok
9 days	Restructure asembler as package	uvok
9 days	relative imports	uvok
9 days	cb: lint1	uvok
9 days	parser: lint	uvok
9 days	assembler: lint	uvok
9 days	Make assembler a module	uvok
9 days	remove obsolete type	uvok
9 days	assembler: Implement	uvok
9 days	pt: Make field annotation clearer	uvok
9 days	parser: use new types	uvok
9 days	lexer: ad missing mnemonics	uvok
9 days	simple_ass_ Make encode method safer	uvok
9 days	parsetypes: Fix hierarchy and rename as sep file	uvok
10 days	Start PLY assembler	uvok
10 days	Create errorinstruction from instruction	uvok
10 days	Fix syntax/ctor error in parser	uvok
10 days	rename current parser	uvok
10 days	type annotations, top-level return...	uvok
11 days	Add example with loop	uvok
11 days	Use custom classes in parser, rearrange	uvok
11 days	py: Reformat files with black	uvok
11 days	git: ignore parsetab	uvok
11 days	lex: Don't warn about newline	uvok
11 days	Add shebangs, exec flag	uvok
11 days	Add previous parser experiments	uvok
11 days	automatic newline add	uvok
11 days	git: ignore parser.out	uvok
11 days	Include NL in lexer/parser	uvok
11 days	Add first version of assembler	uvok
12 days	verilator is required	uvok
12 days	fix alu: bit negate	uvok
12 days	implement hack alu	uvok
12 days	simpc: Rename define appropriately	uvok
12 days	Go back to 1 tick per clock cycle	uvok
12 days	Fix resizing	uvok
12 days	Start in paused mode	uvok
12 days	Add resize handler	uvok
12 days	Draw borders around R[AO]M	uvok
12 days	Use lots of windows	uvok
12 days	Fix pause logic	uvok
12 days	Add ROM window	uvok