fpga-exper - FPGA experiments

Age	Commit message (Expand)	Author
13 days	Mark to-store registers	uvok
13 days	ui: don't halt early (refresh UI)	uvok
13 days	get rid of complicated format specifiers	uvok
13 days	ui: Fix x/y	uvok
13 days	comb_mem: Use async data o	uvok
13 days	Add second example	uvok
13 days	mem: Add async data output	uvok
13 days	comb_mem: Test when output occurs	uvok
13 days	cmake: Gen compile commands	uvok
13 days	computer: get rid of i	uvok
13 days	properly use cmake as mentioned in the docs	uvok
13 days	Utilize cbreak mode	uvok
13 days	fix olde makefile	uvok
13 days	Add paused state, print help	uvok
13 days	Rename functions	uvok
13 days	Improve Cmake file	uvok
13 days	Move finish into UI	uvok
13 days	Move around stuff, split UI	uvok
13 days	Add cmake build for verilator	uvok
13 days	Dumpfile on VERILATOR	uvok
13 days	Ignore build dir	uvok
13 days	Ignore compiled python stuff	uvok
13 days	Reorganize cpp files	uvok
13 days	Show ROM/RAM	uvok
13 days	Redesign UI, add program content	uvok
13 days	Add third assembler example	uvok
13 days	Use sync output for ROM	uvok
13 days	CPU: Annotate unconnected pin	uvok
13 days	Remove rando int	uvok
13 days	computer: Fix x/y	uvok
13 days	comb_mem: Use async data o	uvok
13 days	Add second example	uvok
13 days	mem: Add async data output	uvok
13 days	comb_mem: Test when output occurs	uvok
13 days	reformatcomputer, get rid of i	uvok
13 days	dias: Only return halt for simplified	uvok
14 days	Fixup order/break point	uvok
14 days	don't draw / refresh UI after a halt	uvok
14 days	sim: Properly display results	uvok
14 days	example: Make sure state is shown	uvok
14 days	ignore clangd cache file	uvok
14 days	main: Write tracefile	uvok
14 days	verilator: Enable tracing	uvok
14 days	Implement halting	uvok
14 days	Docu	uvok
14 days	Add WIP hack ALU	uvok
2026-01-09	Add assembler exampel	uvok
2026-01-09	bit 14 unset (w/ 15 set) = illegal ins	uvok
2026-01-09	simu: longer simu, stop condition	uvok
2026-01-09	ncur: print instruction across whole line	uvok