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14 daysmem: Add debug for iveriloguvok
14 daysFix fifo using memory, fix test benchuvok
14 daysmake,verilator: Use 4 make jobsuvok
14 daysAdd memoryuvok
14 daysmake: make verilator quietuvok
14 daysShut up verilators timescale warningsuvok
14 daysfifo :Split in blocksuvok
14 daysfifo: r/w/address logicuvok
14 daysfifo: try implement r/w logicuvok
14 daysfifo: Count bytesuvok
2025-12-28Add a p2s2p test enchuvok
2025-12-28p2s: Check if bits are correctuvok
2025-12-28s2p: count read bytesuvok
2025-12-28p2s: Add valid output signaluvok
2025-12-28Add parameter to s2puvok
2025-12-28add fifouvok
2025-12-28make: Add rules for verilator simulationuvok
2025-12-28makefile: specify dumpfile on cmdlineuvok
2025-12-28tb: Add dumpfilename macrouvok
2025-12-28Add edge testuvok
2025-12-27lint testbenchesuvok
2025-12-27veri: Fix linting errorsuvok
2025-12-27Add verilator lintinguvok
2025-12-27p2s: Always use correct shift widthuvok
2025-12-27p2s: rewrite logicuvok
2025-12-27p2s: Testbench all numsuvok
2025-12-27Re-iterate par2seruvok
2025-12-27fizzbuzz: Add another test outputuvok
2025-12-27Implement fizzbuzzuvok
2025-12-26p2s: Fix logic and reset initializationuvok
2025-12-26p2s: Rename input, improve latencyuvok
2025-12-26Add questionuvok
2025-12-26continue complaininguvok
2025-12-26Make sense to s2p test benchuvok
2025-12-26ser2par: Fix bit order!uvok
2025-12-26template: Move dumpfile to topuvok
2025-12-26Complain about timinguvok
2025-12-26Testbench: turn send bit offuvok
2025-12-26Add quick-and-dirty serial/parallel convertersuvok
2025-12-26debounce_tb: Add assertiinsuvok
2025-12-26make: Add flags to iveriloguvok
2025-12-26Add questionuvok
2025-12-26debounce: Increment clk_count in else blockuvok
2025-12-26Use triple-equal for equalityuvok
2025-12-26Add comment/docuuvok
2025-12-26Add working toggle implementationuvok
2025-12-26docuuvok
2025-12-26debounde: implementuvok
2025-12-26prepare debounceruvok
2025-12-26Add template filesuvok