fpga-exper - FPGA experiments

Age	Commit message (Expand)	Author
13 days	linting, use different naming	uvok
13 days	template: Introduce nedge	uvok
13 days	tst_delay: Fix testbench name	uvok
13 days	Fix testbench	uvok
13 days	fizzbuzz: Fix testbench	uvok
13 days	led_tgl_bounce:Fix testbench	uvok
13 days	led_toggle: Use edge timing, logic	uvok
13 days	p2s2p: Fix testbench	uvok
13 days	my_mem: Use nededge for timing	uvok
13 days	p2s: Fix test bench	uvok
13 days	s2p: Fix testbench	uvok
13 days	make: shut up gtkwave	uvok
14 days	Add fucked test bench	uvok
14 days	mem: Add debug for iverilog	uvok
14 days	Fix fifo using memory, fix test bench	uvok
14 days	make,verilator: Use 4 make jobs	uvok
14 days	Add memory	uvok
14 days	make: make verilator quiet	uvok
14 days	Shut up verilators timescale warnings	uvok
14 days	fifo :Split in blocks	uvok
14 days	fifo: r/w/address logic	uvok
14 days	fifo: try implement r/w logic	uvok
14 days	fifo: Count bytes	uvok
2025-12-28	Add a p2s2p test ench	uvok
2025-12-28	p2s: Check if bits are correct	uvok
2025-12-28	s2p: count read bytes	uvok
2025-12-28	p2s: Add valid output signal	uvok
2025-12-28	Add parameter to s2p	uvok
2025-12-28	add fifo	uvok
2025-12-28	make: Add rules for verilator simulation	uvok
2025-12-28	makefile: specify dumpfile on cmdline	uvok
2025-12-28	tb: Add dumpfilename macro	uvok
2025-12-28	Add edge test	uvok
2025-12-27	lint testbenches	uvok
2025-12-27	veri: Fix linting errors	uvok
2025-12-27	Add verilator linting	uvok
2025-12-27	p2s: Always use correct shift width	uvok
2025-12-27	p2s: rewrite logic	uvok
2025-12-27	p2s: Testbench all nums	uvok
2025-12-27	Re-iterate par2ser	uvok
2025-12-27	fizzbuzz: Add another test output	uvok
2025-12-27	Implement fizzbuzz	uvok
2025-12-26	p2s: Fix logic and reset initialization	uvok
2025-12-26	p2s: Rename input, improve latency	uvok
2025-12-26	Add question	uvok
2025-12-26	continue complaining	uvok
2025-12-26	Make sense to s2p test bench	uvok
2025-12-26	ser2par: Fix bit order!	uvok
2025-12-26	template: Move dumpfile to top	uvok
2025-12-26	Complain about timing	uvok