| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 6 days | Add zbuffer spec | uvok | |
| remove "debug_bus" | |||
| 7 days | (System)Verilog: Be explicit about wire/logic | uvok | |
| 7 days | eater: Add ALU | uvok | |
| while doing so, add always_out port for regs | |||
| 7 days | Better tb for eater cpu | uvok | |
