| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 80 min. | veri: Fix linting errors | uvok | |
| - use instantiation parameter instead of defparam - avoid duplicate name (module/output) | |||
| 2 days | led: rename vars to make more sense | uvok | |
| 3 days | clkdiv: output must be a register | uvok | |
| 3 days | Make clock divider separate module | uvok | |
| 4 days | Add FPGA basics | uvok | |
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index : fpga-exper | |
| FPGA experiments |
| summaryrefslogtreecommitdiff |