| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 13 days | led_toggle: Use edge timing, logic | uvok | |
| 14 days | Shut up verilators timescale warnings | uvok | |
| 2025-12-28 | tb: Add dumpfilename macro | uvok | |
| 2025-12-27 | lint testbenches | uvok | |
| param instantiation | |||
| 2025-12-26 | Add working toggle implementation | uvok | |
 |
index : fpga-exper | |
| FPGA experiments |
| summaryrefslogtreecommitdiff |
path: root/led_toggle.tb.v