| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 14 hours | Use sync output for ROM | uvok | |
| 14 hours | CPU: Annotate unconnected pin | uvok | |
| 15 hours | Dumpfile on VERILATOR | uvok | |
| get rid of VERILATE | |||
| 40 hours | Implement halting | uvok | |
| 2 days | move stuff around | uvok | |
| 4 days | Annozate stuff for verilator | uvok | |
| publicly accessible | |||
| 6 days | use full address space | uvok | |
| 9 days | Rename variables to be more clear, document | uvok | |
| 10 days | Add nandgame computer | uvok | |
 |
index : fpga-exper | |
| FPGA experiments |
| summaryrefslogtreecommitdiff |