fpga-exper - FPGA experiments

Age	Commit message (Expand)	Author
12 days	Fix pause logic	uvok
12 days	Add ROM window	uvok
12 days	Fixup order of refresh/delay	uvok
12 days	Add window for clk/regs	uvok
12 days	reformat code	uvok
12 days	Split off pure terminal output	uvok
12 days	Start adding/using windows	uvok
12 days	Getting started with windows	uvok
12 days	Add FLTK option, don't hard-define NCUR in source	uvok
12 days	Fix format specifier	uvok
12 days	key handling, print finish in bold	uvok
12 days	ui: Remove remaining define	uvok
12 days	Print RAM contents and specify memory context size	uvok
13 days	Print finish message in the top	uvok
13 days	Use control flow for halting	uvok
13 days	Show ROM, hide ALU	uvok
13 days	Remove "offset" variable	uvok
13 days	Add third assembler example	uvok
13 days	Use sync output for ROM	uvok
13 days	CPU: Annotate unconnected pin	uvok
13 days	Mark to-store registers	uvok
13 days	ui: don't halt early (refresh UI)	uvok
13 days	get rid of complicated format specifiers	uvok
13 days	ui: Fix x/y	uvok
13 days	comb_mem: Use async data o	uvok
13 days	Add second example	uvok
13 days	comb_mem: Test when output occurs	uvok
13 days	cmake: Gen compile commands	uvok
13 days	computer: get rid of i	uvok
13 days	properly use cmake as mentioned in the docs	uvok
13 days	Utilize cbreak mode	uvok
13 days	fix olde makefile	uvok
13 days	Add paused state, print help	uvok
13 days	Rename functions	uvok
13 days	Improve Cmake file	uvok
13 days	Move finish into UI	uvok
13 days	Move around stuff, split UI	uvok
13 days	Add cmake build for verilator	uvok
13 days	Dumpfile on VERILATOR	uvok
13 days	Reorganize cpp files	uvok
13 days	dias: Only return halt for simplified	uvok
13 days	Fixup order/break point	uvok
13 days	don't draw / refresh UI after a halt	uvok
13 days	sim: Properly display results	uvok
14 days	example: Make sure state is shown	uvok
14 days	main: Write tracefile	uvok
14 days	verilator: Enable tracing	uvok
14 days	Implement halting	uvok
14 days	Docu	uvok
14 days	Add WIP hack ALU	uvok