fpga-exper - FPGA experiments

Age	Commit message (Expand)	Author
47 hours	verilator: Enable tracing	uvok
47 hours	Implement halting	uvok
47 hours	Docu	uvok
48 hours	Add WIP hack ALU	uvok
3 days	Add assembler exampel	uvok
3 days	bit 14 unset (w/ 15 set) = illegal ins	uvok
3 days	simu: longer simu, stop condition	uvok
3 days	ncur: print instruction across whole line	uvok
3 days	Add LLM assembler	uvok
3 days	make: Unified makefile	uvok
3 days	move stuff around	uvok
3 days	Extract UI drawing	uvok
4 days	include ALU in output	uvok
4 days	Add really nice ncurses UI	uvok
4 days	nandgame: ncurses interface	uvok
4 days	disas, c: Fix compilation, missing header	uvok
4 days	makefile: Add instruction for simulated PC	uvok
5 days	Add cmp instruction	uvok
5 days	disas: endianness	uvok
5 days	cb: specify endianness via arg	uvok
5 days	fix endianness of binary creator	uvok
5 days	Use gen'ed disaas	uvok
5 days	add LLM-gened disas	uvok
5 days	view result register	uvok
5 days	add computer launcher	uvok
5 days	py: Add single-instruction disas	uvok
5 days	disas: Fix for ye olde pyhton	uvok
5 days	Annozate stuff for verilator	uvok
6 days	Documentation	uvok
6 days	disas: Fix fixups	uvok
6 days	test bench for comb_mem	uvok
6 days	use full address space	uvok
6 days	make: Use variables for suffixes	uvok
6 days	include guards	uvok
7 days	disas: Canonocalize AND dest, #0... to mov	uvok
7 days	Canonicalize ops	uvok
7 days	Nicer disas output	uvok
7 days	Improve assembler syntax	uvok
8 days	docu	uvok
8 days	createbin: avoid reserved bits	uvok
8 days	Add disas tests	uvok
8 days	finish disassembler	uvok
8 days	finish disasseembler	uvok
8 days	disas: move arg check in main	uvok
8 days	black format	uvok
8 days	disas: lowercase ops, arg decode	uvok
8 days	decode op and jumps	uvok
8 days	Start by bin creator and disassembler	uvok
9 days	ins: Add flags to docu	uvok
9 days	finish instruction decoder testbench	uvok