| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 13 days | p2s2p: Fix testbench | uvok | |
| iverilog syntax error (needs space) timing use logic, | |||
| 14 days | Shut up verilators timescale warnings | uvok | |
| 2025-12-28 | Add a p2s2p test ench | uvok | |
 |
index : fpga-exper | |
| FPGA experiments |
| summaryrefslogtreecommitdiff |
path: root/par_to_ser_to_ser.tb.v