| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2025-12-29 | Shut up verilators timescale warnings | uvok | |
| 2025-12-28 | tb: Add dumpfilename macro | uvok | |
| 2025-12-26 | Make sense to s2p test bench | uvok | |
| 2025-12-26 | Add quick-and-dirty serial/parallel converters | uvok | |
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index : fpga-exper | |
| FPGA experiments |
| summaryrefslogtreecommitdiff |
| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2025-12-29 | Shut up verilators timescale warnings | uvok | |
| 2025-12-28 | tb: Add dumpfilename macro | uvok | |
| 2025-12-26 | Make sense to s2p test bench | uvok | |
| 2025-12-26 | Add quick-and-dirty serial/parallel converters | uvok | |