From 7d22f794e4b80db6981a50bc2b6478ef911cb32c Mon Sep 17 00:00:00 2001
From: uvok
Date: Sat, 10 Jan 2026 09:37:44 +0100
Subject: Add WIP hack ALU

---
 nandgame/hack_alu.sv | 71 ++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 71 insertions(+)
 create mode 100644 nandgame/hack_alu.sv

diff --git a/nandgame/hack_alu.sv b/nandgame/hack_alu.sv
new file mode 100644
index 0000000..9dd5dfa
--- /dev/null
+++ b/nandgame/hack_alu.sv
@@ -0,0 +1,71 @@
+// HACK / nand2tetris ALU
+
+`timescale 1us/1us
+
+`include "nandgame_types.v"
+`include "arith_unit.sv"
+`include "logic_unit.sv"
+
+`ifndef NANDGAME_ALU
+`define NANDGAME_ALU
+
+module  alu #(
+  parameter DATA_WIDTH = 16
+) (
+  // "X" operand
+  input [(DATA_WIDTH-1):0] X_in,
+  // "Y" operand
+  input [(DATA_WIDTH-1):0] Y_in,
+
+  // zero X
+  input zx,
+  // negate X
+  input nx,
+  // zero Y
+  input zy,
+  // negate Y
+  input ny,
+
+  // "u" flag. 1=add, 0=and
+  input logic f_arith_nlogic_in,
+
+  // negate output
+  input logic neg_out,
+
+  // result of operation
+  output logic [(DATA_WIDTH-1):0] result_out,
+  // Result is zero
+  output logic zero_out,
+  // result is negative
+  output logic negate_out
+);
+
+logic [(DATA_WIDTH-1):0] int_op_x /* verilator public */;
+logic [(DATA_WIDTH-1):0] int_op_y /* verilator public */;
+
+// logic [(DATA_WIDTH-1):0] int_result_arith;
+// logic [(DATA_WIDTH-1):0] int_result_logic;
+
+// assign int_op_x = zx_in ? 0
+//                   : (sw_in ? Y_in : X_in);
+// assign int_op_y = sw_in ? X_in : Y_in;
+
+// arith_unit au (
+//   .X_in(int_op_x),
+//   .Y_in(int_op_y),
+//   .result_out(int_result_arith),
+//   .arith_operation_in(ArithCode'(opcode_in))
+// );
+
+// logic_unit lu (
+//   .X_in(int_op_x),
+//   .Y_in(int_op_y),
+//   .result_out(int_result_logic),
+//   .logic_operation_in(LogicCode'(opcode_in))
+// );
+
+// assign result_out = u_arith_nlogic_in ? int_result_arith : int_result_logic;
+
+endmodule
+
+`endif
-- 
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