From 261ae8eadc8a910b05d9d2b73b5be1272be7a26c Mon Sep 17 00:00:00 2001 From: uvok Date: Fri, 16 Jan 2026 15:00:51 +0100 Subject: eater_alu: Use 2complneg instead of subtract --- eater_cpu/eater_alu.sv | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) (limited to 'eater_cpu/eater_alu.sv') diff --git a/eater_cpu/eater_alu.sv b/eater_cpu/eater_alu.sv index b0fa9ae..01b62ae 100644 --- a/eater_cpu/eater_alu.sv +++ b/eater_cpu/eater_alu.sv @@ -6,12 +6,19 @@ module eater_alu ( input clk_in, input en_output_in, + input subtract_n_add_in, + input [7:0] A_in, input [7:0] B_in, output [7:0] bus_out ); -assign bus_out = en_output_in ? 0 : 8'bz; +// wire [7:0] result = subtract_n_add_in ? (A_in - B_in) : (A_in + B_in); +wire [7:0] xormask = {8{subtract_n_add_in}}; +wire [7:0] B_neg_if = B_in ^ xormask; +wire [7:0] result2 = A_in + B_neg_if + subtract_n_add_in; + +assign bus_out = en_output_in ? result2 : 8'bz; endmodule -- cgit v1.2.3