From 08736d0ca2bc9abe56ce0a306ebaa58021ae7f0e Mon Sep 17 00:00:00 2001 From: uvok Date: Thu, 15 Jan 2026 18:44:31 +0100 Subject: Add 1st sketch of eater cpu --- eater_cpu/eater_register.v | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 eater_cpu/eater_register.v (limited to 'eater_cpu/eater_register.v') diff --git a/eater_cpu/eater_register.v b/eater_cpu/eater_register.v new file mode 100644 index 0000000..0502c8a --- /dev/null +++ b/eater_cpu/eater_register.v @@ -0,0 +1,35 @@ +`timescale 1us/1us + +`ifndef EATER_REGISTER +`define EATER_REGISTER + +module eater_register #( + parameter DATA_WIDTH = 8 +) ( + input clk_i, + + // sync? async? + input en_store_i, + input en_output_i, + + input [(DATA_WIDTH-1) : 0] data_i, + output [(DATA_WIDTH-1) : 0] data_o +); + +reg [(DATA_WIDTH-1) : 0] r_datastore /* verilator public */; + +reg int_output_data; + +always @(posedge clk_i) begin + if (en_store_i) begin + r_datastore <= data_i; + end + + int_output_data <= en_output_i; +end + +assign data_o = int_output_data ? r_datastore : 'z; + +endmodule + +`endif -- cgit v1.2.3