From 47c26f27b8be4c6c22ed81f701f1b25072bb3341 Mon Sep 17 00:00:00 2001 From: uvok Date: Fri, 16 Jan 2026 18:22:10 +0100 Subject: (System)Verilog: Be explicit about wire/logic --- playground/led_toggle.v | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'playground/led_toggle.v') diff --git a/playground/led_toggle.v b/playground/led_toggle.v index 3c54ee4..f26d3be 100644 --- a/playground/led_toggle.v +++ b/playground/led_toggle.v @@ -7,10 +7,10 @@ `include "debounce.v" module led_toggle ( - input rst_i, - input clk_i, - input key_i, - output [5:0] led + input wire rst_i, + input wire clk_i, + input wire key_i, + output wire [5:0] led ); parameter STABLE_PERIOD = 50; -- cgit v1.2.3