From 47c26f27b8be4c6c22ed81f701f1b25072bb3341 Mon Sep 17 00:00:00 2001
From: uvok
Date: Fri, 16 Jan 2026 18:22:10 +0100
Subject: (System)Verilog: Be explicit about wire/logic

---
 playground/led_toggle_bouncy.v | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

(limited to 'playground/led_toggle_bouncy.v')

diff --git a/playground/led_toggle_bouncy.v b/playground/led_toggle_bouncy.v
index b05b472..8e783f2 100644
--- a/playground/led_toggle_bouncy.v
+++ b/playground/led_toggle_bouncy.v
@@ -4,9 +4,9 @@
 // bouncy variant
 
 module led_toggle_bouncy (
-  input clk_i,
-  input key_i,
-  output [5:0] led
+  input wire clk_i,
+  input wire key_i,
+  output wire [5:0] led
 );
 
 reg r_LED_1 = 1'b1;
-- 
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