From 6c83fd8730e55de8b1daaac1deb111d3d9bd408e Mon Sep 17 00:00:00 2001 From: uvok Date: Fri, 9 Jan 2026 15:18:23 +0100 Subject: move stuff around --- playground/tst_delay_tb.v | 53 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 playground/tst_delay_tb.v (limited to 'playground/tst_delay_tb.v') diff --git a/playground/tst_delay_tb.v b/playground/tst_delay_tb.v new file mode 100644 index 0000000..5812068 --- /dev/null +++ b/playground/tst_delay_tb.v @@ -0,0 +1,53 @@ +// try to figure out how iverilog samples edges +`timescale 1us/1us + +module tst_delay_tb; + +reg clk_i; +reg data_i; +wire data_o; + +tst_delay uut ( + .clk_i(clk_i), + .data_i(data_i), + .data_o(data_o) +); + +string filename; +initial begin +`ifdef DUMP_FILE_NAME + filename=`DUMP_FILE_NAME; +`else + filename="tst_delay.lxt2"; +`endif + $dumpfile(filename); $dumpvars(); + clk_i = 0; + data_i = 0; +end + +always #10 clk_i = ~clk_i; + +initial begin + #9 + data_i = 1; + #2 + data_i = 0; + + /* verilator lint_off INITIALDLY */ + // note the <= assignment + #19 + data_i <= 1; + /* verilator lint_on INITIALDLY */ + + #1 + data_i = 0; + // note the = assignment + #19 + data_i = 1; + #1 + data_i = 0; + #40 + $finish(); +end + +endmodule -- cgit v1.2.3