From d0a372c3112b28ff3b1bf03ff4a7a0e5a3cafe8e Mon Sep 17 00:00:00 2001
From: uvok
Date: Tue, 30 Dec 2025 10:21:27 +0100
Subject: linting, use different naming

use _tb.v instead of .tb.v,
to stop verilator from shouting
the module name doesn't
match
---
 tst_delay.tb.v | 50 --------------------------------------------------
 1 file changed, 50 deletions(-)
 delete mode 100644 tst_delay.tb.v

(limited to 'tst_delay.tb.v')

diff --git a/tst_delay.tb.v b/tst_delay.tb.v
deleted file mode 100644
index 41a133a..0000000
--- a/tst_delay.tb.v
+++ /dev/null
@@ -1,50 +0,0 @@
-// try to figure out how iverilog samples edges
-`timescale 1us/1us
-
-module tst_delay_tb (
-);
-
-reg clk_i;
-reg data_i;
-wire data_o;
-
-tst_delay uut(
-  .clk_i(clk_i),
-  .data_i(data_i),
-  .data_o(data_o)
-);
-
-string filename;
-initial begin
-`ifdef DUMP_FILE_NAME
-  filename=`DUMP_FILE_NAME;
-`else
-  filename="tst_delay.lxt2";
-`endif
-  $dumpfile(filename); $dumpvars();
-  clk_i = 0;
-  data_i = 0;
-end
-
-always #10 clk_i = ~clk_i;
-
-initial begin
-  #9
-  data_i = 1;
-  #2
-  data_i = 0;
-  // note the <= assignment
-  #19
-  data_i <= 1;
-  #1
-  data_i = 0;
-  // note the = assignment
-  #19
-  data_i = 1;
-  #1
-  data_i = 0;
-  #40
-  $finish();
-end
-
-endmodule
-- 
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