From 0f9b0dd686f816c9e18debbbe9523ac0de683acf Mon Sep 17 00:00:00 2001 From: uvok Date: Thu, 1 Jan 2026 16:05:00 +0100 Subject: tbs: remove e empty parens --- tst_delay_tb.v | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'tst_delay_tb.v') diff --git a/tst_delay_tb.v b/tst_delay_tb.v index 03ef185..5812068 100644 --- a/tst_delay_tb.v +++ b/tst_delay_tb.v @@ -1,8 +1,7 @@ // try to figure out how iverilog samples edges `timescale 1us/1us -module tst_delay_tb ( -); +module tst_delay_tb; reg clk_i; reg data_i; -- cgit v1.2.3