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|
// represents the Ben Eater 8bit computer - ALU
`timescale 1us/1us
module eater_alu (
input clk_in,
input en_output_in,
input subtract_n_add_in,
input [7:0] A_in,
input [7:0] B_in,
output [7:0] bus_out
);
// wire [7:0] result = subtract_n_add_in ? (A_in - B_in) : (A_in + B_in);
wire [7:0] xormask = {8{subtract_n_add_in}};
wire [7:0] B_neg_if = B_in ^ xormask;
wire [7:0] result2 = A_in + B_neg_if + subtract_n_add_in;
assign bus_out = en_output_in ? result2 : 8'bz;
endmodule
|
