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// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: main() simulation loop, created with --main

#include "simpc_config.h"
#include "simpc_types.h"
#include "simpc_ui.h"

#include "Vcomputer.h"
#include "Vcomputer___024root.h"
#include "Vcomputer_computer.h"
#include "Vcomputer_my_mem__D10_DB10000.h"
#include "verilated.h"
#include <cstdio>
#include <sched.h>

//======================

int main(int argc, char **argv, char **) {

  // Setup context, defaults, and parse command line
  Verilated::debug(0);
  const std::unique_ptr<VerilatedContext> contextp{new VerilatedContext};
  Verilated::traceEverOn(true);
  contextp->threads(1);
  contextp->commandArgs(argc, argv);

  // Construct the Verilated model, from Vtop.h generated from Verilating
  const std::unique_ptr<Vcomputer> topp{new Vcomputer{contextp.get(), ""}};

  if (argc != 2) {
    fprintf(stderr, "Usage: %.20s [filename]\n\n", argv[0]);
    exit(-1);
  }
  int i = 0;
  puts("Start simulation.");
  // topp->computer->clk_in = 0;
  topp->clk_in = 0;
  FILE *f = fopen(argv[1], "rb");
  if (!f) {
    fprintf(stderr, "Program file %.20s not found.\n", argv[1]);
    exit(-1);
  }
  fseek(f, 0, SEEK_END);
  long fpos = ftell(f);
  fseek(f, 0, SEEK_SET);
  size_t bytes_read =
      fread(topp->computer->ROM->r_datastore.m_storage, 2, fpos / 2, f);

  if (bytes_read * 2 != fpos) {
    fputs("Couldn't read program file completely.", stderr);
    exit(-1);
  }

  simpc_ui_init();

  while (VL_LIKELY(!contextp->gotFinish()) && i < 500) {
    // doesn't work.
    // topp->computer->clk_in = ~topp->computer->clk_in;

    if (i != 0 && (i % TICKS_PER_INS) == 0) {
      topp->clk_in = !topp->clk_in;
    }

    simpc_ui_write(topp, i, StepPosition_t::BEFORE_EVAL);

    // Evaluate model
    topp->eval();

    // both bits 14 and 15 need to be set
    if (topp->halt)
      break;

    simpc_ui_write(topp, i, StepPosition_t::AFTER_EVAL);

    // Advance time
    contextp->timeInc(1);
    i++;
  }

  simpc_ui_finish_message(contextp, topp);

  if (VL_LIKELY(!contextp->gotFinish())) {
    VL_DEBUG_IF(VL_PRINTF("+ Exiting without $finish; no events left\n"););
  }

  // for tracefile to properly show
  for (int i = 0; i < 10; i++) {
    contextp->timeInc(1);
    topp->eval();
  }
  // Execute 'final' processes
  topp->final();

  // Print statistical summary report
  // contextp->statsPrintSummary();

  simpc_ui_cleanup();

  return 0;
}