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#include "simpc_ui.h"
#include "simpc_config.h"
#include "disas.h"
#define MEMORY_CONTEXT 3
#include <ncurses.h>
#define PRINT_ME(y, x, ...) \
{ mvprintw(y, x, __VA_ARGS__); }
#define PRINT_ME_W(w, y, x, ...) \
{ mvwprintw(w, y, x, __VA_ARGS__); }
#define PRINT_NEXT(dly) \
{ \
refresh(); \
wrefresh(status_top); \
wrefresh(clock_regs); \
wrefresh(ROM); \
wrefresh(RAM1); \
wrefresh(RAM2); \
if (dly) { \
napms(NCUR_DELAY_MS); \
} \
}
#define SIMPLE_BORDER(w, lr, tb, c) \
{ wborder(w, lr, lr, tb, tb, c, c, c, c); }
static WINDOW *status_top = NULL;
static WINDOW *clock_regs = NULL;
static WINDOW *ROM = NULL;
static WINDOW *RAM1 = NULL;
static WINDOW *RAM2 = NULL;
#include "Vcomputer.h"
#include "Vcomputer___024root.h"
#include "Vcomputer_comb_mem.h"
#include "Vcomputer_computer.h"
#include "Vcomputer_my_mem__D10_DB10000.h"
#include "verilated.h"
#include <cstdint>
#include <cstdio>
#include <sched.h>
bool paused = false;
static void handle_key();
void simpc_ui_write(const std::unique_ptr<Vcomputer> &topp, uint64_t &i,
StepPosition_t sp) {
uint16_t opcode = topp->computer->PC_content_int;
PRINT_ME_W(status_top, 1, 1, "Step: %10lu \b%c", i,
sp == StepPosition_t::BEFORE_EVAL ? 'A' : 'B');
PRINT_ME_W(status_top, 2, 1, "%-20s", paused ? "Paused" : "Running");
PRINT_ME_W(clock_regs, 1, 1, "CLK: %4d\tPC: 0x%04X\tINS: 0x%04X\tHLT: %6d",
topp->clk_in,
// wrong
// topp->computer->clk_in,
topp->computer->PC_addr_int, opcode, topp->halt);
PRINT_ME_W(clock_regs, 2, 1,
"A: 0x%04X\tD: 0x%04X\tM: 0x%04X\tRES: 0x%04X",
topp->computer->reg_A_int, topp->computer->reg_D_int,
topp->computer->reg_pA_int, topp->computer->result_int);
PRINT_ME_W(
clock_regs, 3, 1, "%c%8d\t%c %8d\t%c %8d\t%11d",
topp->computer->store_to_A_int ? '*' : ' ', topp->computer->reg_A_int,
topp->computer->store_to_D_int ? '*' : ' ', topp->computer->reg_D_int,
topp->computer->store_to_pA_int ? '*' : ' ', topp->computer->reg_pA_int,
topp->computer->result_int);
SIMPLE_BORDER(ROM, '|', '-', '+');
PRINT_ME_W(ROM, 0, 1, "%-35s", "--- ROM ---");
PRINT_ME_W(RAM1, 0, 1, "%-15s", "--- RAM1 ---");
PRINT_ME_W(RAM2, 0, 1, "%-15s", "-- RAM2 --");
for (int i = -MEMORY_CONTEXT; i <= MEMORY_CONTEXT; i++) {
const int ypos_base = 1 + MEMORY_CONTEXT;
const char *prefix = i == 0 ? "> " : " ";
int32_t current_ROM_address = topp->computer->PC_addr_int + i;
int32_t current_RAM_address = topp->computer->reg_A_int + i;
if (current_ROM_address < 0) {
PRINT_ME_W(
ROM, ypos_base + i, 1, "%.35s",
"---------------------------------------------------------------");
} else {
const uint16_t p = current_ROM_address;
const uint16_t program_op_code = topp->computer->ROM->r_datastore[p];
auto disas_code = print_decoded(program_op_code, true);
PRINT_ME_W(ROM, ypos_base + i, 1, "%04X %s%04X %-30s",
current_ROM_address, prefix, program_op_code,
disas_code.c_str());
// mvchgat in bold
}
if (current_RAM_address < 0) {
PRINT_ME_W(
RAM1, ypos_base + i, 1, "%.12s",
"---------------------------------------------------------------");
} else {
const uint16_t p = current_RAM_address;
const uint16_t mem_content =
topp->computer->RAM->nand_memory->r_datastore[p];
PRINT_ME_W(RAM1, ypos_base + i, 1, "%04X %s%04X", current_RAM_address,
prefix, mem_content);
}
{
const uint16_t p = MEMORY_CONTEXT + i;
const uint16_t mem_content =
topp->computer->RAM->nand_memory->r_datastore[p];
PRINT_ME_W(RAM2, ypos_base + i, 1, "%04X %04X%30c", p, mem_content, ' ');
}
}
// PRINT_ME(7 + NCUR_OFFSET, NCUR_X, "ALU");
// PRINT_ME(8 + NCUR_OFFSET, NCUR_X, "X: %5d\tY: %5d",
// topp->computer->CPU->my_alu->int_op_x,
// topp->computer->CPU->my_alu->int_op_y);
PRINT_ME(getmaxy(stdscr) - 1, 1,
" q - Quit; p - (Un)pause; s - step (while paused) ");
PRINT_NEXT(true);
handle_key();
}
void simpc_ui_finish_message(const std::unique_ptr<VerilatedContext> &contextp,
const std::unique_ptr<Vcomputer> &topp) {
attron(A_BOLD);
auto xpos = 20;
PRINT_ME_W(status_top, 1, xpos, "Simulation finished.");
const char *msg;
if (topp->halt) {
msg = "Halt encountered.";
} else if (!contextp->gotFinish()) {
msg = "Step count exceeded.";
} else {
msg = "Regular finish.";
}
PRINT_ME_W(status_top, 2, xpos, "%s", msg);
PRINT_NEXT(false);
attroff(A_BOLD);
}
void simpc_ui_init(void) {
#if NCUR
initscr();
curs_set(0);
// lines, cols, ypos, xpos
status_top = newwin(4, 50, 0, 0);
wrefresh(status_top);
clock_regs = newwin(5, 80, 3, 0);
wrefresh(clock_regs);
auto numlines = 1 + 2 * MEMORY_CONTEXT + 2;
auto romwidth = 41;
auto ram1width = 16;
ROM = newwin(numlines, romwidth, 10, 0);
wrefresh(ROM);
// non-overlapping
RAM1 = newwin(numlines, ram1width, 10, romwidth);
wrefresh(RAM1);
RAM2 = newwin(numlines, 15, 10, romwidth + ram1width);
wrefresh(RAM2);
int rc;
rc = wresize(stdscr, getmaxy(stdscr) - 3, getmaxx(stdscr));
assert(rc == 0);
rc = mvwin(stdscr, 3, 0);
assert(rc == 0);
nodelay(stdscr, TRUE);
noecho();
cbreak();
#endif
}
void simpc_ui_cleanup(void) {
#if NCUR
nocbreak();
echo();
auto ws = {status_top, clock_regs, ROM, RAM1, RAM2};
for (auto &w : ws) {
if (w) {
delwin(w);
}
}
endwin();
#endif
}
void simpc_ui_confirm_finish(void) {
#if NCUR
nodelay(stdscr, FALSE);
getch();
#endif
}
static void handle_key() {
bool block_here = paused;
do {
int ch = getch();
switch (ch) {
case 'p':
// pass *current* state.
// pass false (currently running) - getch will block (entering step mode).
// pass true (currently paused) - getch will be non-blocking.
nodelay(stdscr, paused);
paused = !paused;
block_here = paused;
break;
case 'q':
simpc_ui_cleanup();
exit(0);
break;
case 's':
block_here = false;
break;
}
} while (block_here);
}
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