blob: d89bbb0ce67622bcab8ba04ed26c4a2823f62cc8 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
|
---
{: .spaced.top }
## Verilog series
0. [Presenting my FPGA dev board]({% post_url 2025-12-26-fpga-dev-board %})
1. [Getting Started with Verilog]({% post_url 2026-01-06-getting-started-with-verilog %})
2. TODO
---
{: .spaced.bottom }
|
