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-rw-r--r--eater_cpu/eater_types.sv5
1 files changed, 3 insertions, 2 deletions
diff --git a/eater_cpu/eater_types.sv b/eater_cpu/eater_types.sv
index bff9abc..c7f0cf0 100644
--- a/eater_cpu/eater_types.sv
+++ b/eater_cpu/eater_types.sv
@@ -8,7 +8,7 @@ typedef enum logic[7:0] {
// "regular" states
INIT,
PC_to_MAR,
- MEM_to_INS,
+ MEM_to_INS_PC_inc,
// Note:
// The Ben Eater CPU combines these steps. However.
// I got probably a bug in my state machine,
@@ -16,7 +16,8 @@ typedef enum logic[7:0] {
// but if I combine the steps, I'm trying to get
// the instruction-dependent next state before
// the INS is actually loaded. whoops.
- PC_inc,
+ // One day later: Possible if we run the decoder on the negedge
+ // PC_inc,
// instruction dependent states